Pixel Isolation Layout With Charge Trapping for Well Isolation
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Solution Overview
Problem
In solid-state imaging devices, the isolation of wells is degraded when a charge trapping layer is introduced, leading to issues such as varying threshold voltages and short-circuited transistors due to increased impurity concentration and potential drops in intersection regions.
Innovation Solution
The implementation of a pixel array with element isolation layers surrounding photoelectric conversion units, where charge storage and charge trapping layers are provided between adjacent pixels, and the charge trapping layer is strategically positioned to reduce light leakage and impurity concentration in intersection regions, ensuring reliable well isolation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If a charge trapping layer is introduced to reduce light leakage, then light shielding performance is improved, but well isolation is degraded due to increased impurity concentration and potential drops
Solution Approach 1:
The patent divides the charge trapping layer into multiple segments: a first charge trapping layer and a second charge trapping layer, with the first layer having higher impurity concentration than the second layer. This segmentation allows the structure to provide effective light shielding while reducing the overall impurity concentration impact on well isolation, thereby resolving the contradiction between light leakage prevention and well isolation maintenance.
2Object-affected harmful factors
If element isolation layers are provided surrounding each photoelectric conversion unit, then light shielding is improved, but device complexity increases
Solution Approach 1:
The patent combines multiple functions into the element isolation layers: they serve both as light-shielding structures and as regions containing charge trapping layers. By merging the light shielding function with the charge trapping function in the same structural region, the patent reduces device complexity while maintaining effective light leakage prevention.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration maintains excellent well isolation and reduces light leakage, thereby improving image quality and preventing transistor failures by adjusting potential levels and impurity concentrations in the charge trapping layer.
Implementation Method 1
Each of the pixels includes a photoelectric conversion unit configured to generate a signal charge based on incident light
Implementation Method 2
a charge trapping layer for reducing incidence of light on the charge storage layer
Data Source
AI summary
A solid-state imaging device includes a pixel array where pixels are arranged in a matrix. Each of the pixels includes a photoelectric conversion unit configured to generate a signal charge based on incident light, and an element isolation layer having light-shielding properties and surrounding a periphery of the photoelectric conversion unit. The element isolation layers of adjacent ones of the pixels in a row direction and a column direction are isolated from each other. A charge storage layer and a charge trapping layer are provided in each of regions between the element isolation layers of the adjacent ones of the pixels in the row direction and the column direction. The charge storage layer stores the signal charge. The charge trapping layer reduces incidence of light on the charge storage layer.