Pixel Layer Stacking for Reliable, Compact Electrical Connections
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Solution Overview
Problem
Existing pixel structures in display devices face challenges in achieving reliable electrical connections and efficient use of space due to the complexity of conductive and semiconductor layers, which can lead to reduced pixel density and potential reliability issues.
Innovation Solution
A pixel structure is designed with a first pattern on a substrate, featuring a lower and upper penetration hole configuration, a buffer layer, a protective layer, and an auxiliary conductive layer to ensure reliable electrical connections and compact layer stacking, using materials like metal oxides and conductive materials to enhance reliability and reduce space occupation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple conductive and semiconductor layers are stacked to achieve reliable electrical connections, then electrical connectivity is improved, but device complexity and space occupation increase
Solution Approach 1:
The pixel structure is divided into multiple functional layers including lower insulating layer array, upper insulating layer array, buffer layer, protective layer, and auxiliary conductive layer. Each layer serves a specific function in establishing reliable electrical connections while maintaining organizational simplicity through clear segmentation of responsibilities.
Solution Approach 2:
The patent transitions from planar 2D connections to 3D vertical stacking by introducing penetration holes through insulating layers and stacking conductive patterns in multiple layers. This dimensional transition enables reliable electrical connectivity through vertical pathways while reducing horizontal space occupation.
2Reliability
If penetration holes are created in insulating layers to establish electrical connections, then electrical connectivity is improved, but manufacturing precision requirements increase
Solution Approach 1:
Penetration holes are formed in the lower insulating layer array and upper insulating layer array before subsequent conductive layers are deposited. This preliminary formation of connection pathways ensures proper alignment and positioning, reducing the precision requirements for later manufacturing steps while guaranteeing reliable electrical connections.
3Ease of manufacture
If auxiliary conductive layers and buffer layers are added to compensate for step differences, then manufacturing ease is improved, but device complexity increases
Solution Approach 1:
The buffer layer serves as an intermediary element between the lower insulating layer array and the upper insulating layer array, compensating for step differences and providing a flat surface for subsequent deposition. The protective layer acts as another intermediary to protect underlying structures during manufacturing processes, easing fabrication while maintaining a manageable layer structure.
Data Source
AI summary
Provided is a pixel including a first pattern disposed on a substrate, a lower insulating layer array including a lower penetration hole exposing a portion of the first pattern, a second pattern which is electrically in contact with the first pattern through the lower penetration hole and includes a recessed portion overlapping the lower penetration hole, a buffer layer filling the recessed portion, a protective layer interposed between the buffer layer and the second pattern in the recessed portion, an auxiliary conductive layer which overlaps the lower penetration hole in a thickness direction and covers the buffer layer and the second pattern adjacent to the buffer layer, an upper insulating layer array including an upper penetration hole exposing a portion of the auxiliary conductive layer, and a third pattern electrically in contact with the auxiliary conductive layer through the upper penetration hole.