Pixel Conductive Layer Stacking to Reduce Hillock Formation
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Solution Overview
Problem
Existing display devices face challenges in achieving reliable pixel structures due to issues such as hillock formation and conductivity variations in conductive layers, which affect the performance and longevity of the pixels.
Innovation Solution
The pixel structure incorporates a stacked conductive layer design with a first bottom conductive layer having a thicker alloy layer than a second bottom conductive layer, using aluminum and titanium alloys to enhance reliability and prevent hillock formation, along with a gate conductive layer and source-drain conductive layers with specific thicknesses to ensure stable electrical connections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional single-layer conductive structure is used, then the manufacturing process is simple, but hillock formation occurs and reliability is reduced
Solution Approach 1:
The conductive layer is segmented into multiple sub-layers (first metal layer, alloy layer, second metal layer) within the bottom conductive structure. This segmentation allows each layer to perform specific functions: the first metal layer provides conductivity, the alloy layer prevents hillock formation through controlled intermetallic compounds, and the second metal layer enhances adhesion and stability
Solution Approach 2:
The patent employs composite material structure by combining different metal materials (Aluminum, Titanium, Molybdenum) in a stacked configuration. The alloy layer specifically uses Al-Ti or Al-Mo composite materials that form controlled intermetallic compounds to prevent hillock formation while maintaining electrical conductivity and mechanical stability
2Reliability
If the alloy layer thickness is increased in both conductive layers, then hillock formation is prevented, but manufacturing precision requirements increase
Solution Approach 1:
The patent applies different alloy layer thicknesses to different conductive layers based on their specific functional requirements. The first bottom conductive layer has a thicker alloy layer (50-150 nm) for enhanced hillock prevention in the capacitor electrode region, while the second bottom conductive layer has a thinner alloy layer (20-80 nm) sufficient for the transistor source/drain region. This local differentiation optimizes reliability while reducing overall manufacturing precision burden
Solution Approach 2:
The patent specifies precise thickness parameters for each layer to control the formation and properties of intermetallic compounds. By controlling the alloy layer thickness within specific ranges and using controlled annealing temperatures, the patent optimizes the balance between hillock prevention and manufacturing feasibility
3Reliability
If multiple metal layers are stacked, then conductivity and reliability are improved, but the number of manufacturing steps increases
Solution Approach 1:
The patent performs preliminary alloy formation by stacking the metal layers with pre-determined thicknesses and material compositions before final annealing. The alloy layer is prepared in advance with controlled thickness to ensure proper intermetallic compound formation during subsequent annealing, preventing hillock formation before the devices are fully assembled
Solution Approach 2:
The patent controls the annealing temperature and time parameters to optimize intermetallic compound formation without requiring excessive manufacturing steps. By carefully selecting annealing conditions, the patent achieves reliable conductive layers with controlled alloy thickness and composition, balancing manufacturing simplicity with device reliability
Data Source
AI summary
A pixel may include a first bottom conductive layer including a plurality of first bottom conductive patterns, a second bottom conductive layer disposed on the first bottom conductive layer, and including a plurality of second bottom conductive patterns, and a semiconductor layer disposed on the second bottom conductive layer. The first bottom conductive layer may have a stacked structure including a first metal layer, an alloy layer, and a second metal layer stacked on each other. The second bottom conductive layer may have a stacked structure including a first metal layer, an alloy layer, and a second metal layer stacked on each other. A thickness of the alloy layer in the first bottom conductive layer may be greater than a thickness of the alloy layer in the second bottom conductive layer.