Pixel Layout for Low-Leakage Image Sensor Dark Performance
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Solution Overview
Problem
Existing image sensors face challenges in efficiently integrating pixel circuits within pixels, leading to issues such as increased leakage and reduced dark level performance due to the proximity of floating diffusion regions to transfer gate structures.
Innovation Solution
The image sensor design includes a floating diffusion contact positioned closer to the pixel isolation film than to the transfer gate structure, with transistors spaced apart, and a floating diffusion region with a larger area than active regions, reducing leakage and enhancing dark level performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the floating diffusion contact is positioned closer to the transfer gate structure, then the pixel circuit integration density is improved, but leakage increases and dark level performance deteriorates
Solution Approach 1:
The patent applies local quality by creating different impurity concentration zones within the floating diffusion region. A first doped region with higher impurity concentration is positioned adjacent to the transfer gate structure to reduce leakage, while a second doped region with lower impurity concentration is positioned away from the transfer gate to maintain dark level performance. This spatial variation in impurity concentration allows the structure to simultaneously achieve both high integration density and reliable dark level performance.
2Area of stationary object
If the transistor is positioned closer to the floating diffusion region, then the pixel circuit area is reduced, but leakage increases
Solution Approach 1:
The patent introduces an intermediary element - the element isolation film - positioned between the transistor and the floating diffusion region. This isolation film acts as a mediator that allows the transistor to be positioned close to the floating diffusion region for area efficiency while preventing direct harmful interactions that would cause leakage. The isolation film creates an electrical barrier that blocks leakage paths while maintaining the compact layout.
3Reliability
If the floating diffusion region area is increased, then the capacitance is improved, but the pixel area increases
Solution Approach 1:
The patent applies the nesting principle by placing the first doped region (with higher impurity concentration) within or adjacent to the second doped region (with lower impurity concentration) in a nested or closely integrated configuration. This allows the floating diffusion region to maintain a compact overall area while creating effective capacitance through the strategically positioned high-concentration doped region adjacent to the transfer gate structure, thus achieving both small pixel area and sufficient capacitance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration minimizes leakage, reduces white spots, and improves dark level performance by maintaining a longer distance between the floating diffusion contact and the transfer gate structure, thereby increasing integration density and overall sensor performance.
Implementation Method 1
Each of the pixels may include a photodiode, and a pixel circuit converting electric charges generated by the photodiode into an electric signal
Implementation Method 2
a floating diffusion region doped with impurities of a first conductivity type
Data Source
AI summary
An image sensor includes pixels arranged parallel to an upper surface of a substrate and a pixel isolation film disposed between the pixels. Each pixel includes a floating diffusion region doped with impurities of a first conductivity type, a transfer gate structure adjacent to the floating diffusion region, and a transistor. The transfer gate structure includes a transfer gate electrode layer, a transfer gate insulating layer, and a transfer gate spacer adjacent to the transfer gate insulating layer in a first direction parallel to the upper surface of the substrate, and a portion of the transfer gate spacer is disposed between the floating diffusion region and the transfer gate electrode layer. In each pixel, a floating diffusion contact connected to the floating diffusion region is disposed more adjacent in the first direction to the pixel isolation film than to the transfer gate structure.