Symmetrical Pixel Circuit Layout With Guard Traces for Higher Resolution
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing display devices face challenges in improving resolution due to the presence of guard traces that disrupt the symmetry and spacing of pixel circuits, leading to inefficiencies in signal transmission and electromagnetic interference.
Innovation Solution
A display device design that incorporates symmetrical pixel circuit structures with guard traces extending in the second direction, allowing for the first pixel circuit structure and the second pixel circuit structure to be plane-symmetrical with respect to a symmetry plane, eliminating guard traces between adjacent areas and reducing the distance between pixel circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If guard traces are disposed between adjacent pixel circuit structures, then electromagnetic interference is reduced, but the distance between pixel circuits increases and resolution deteriorates
Solution Approach 1:
The patent extracts and removes guard traces from the regions between adjacent pixel circuit structures that would increase spacing. By selectively eliminating these intermediate guard traces while maintaining guard traces at critical boundaries, the design reduces the distance between pixel circuits to improve resolution while preserving electromagnetic interference protection where needed.
Solution Approach 2:
The patent applies different guard trace configurations to different regions of the display device. Guard traces are selectively disposed based on local requirements - maintaining them at boundaries where electromagnetic interference protection is critical, while removing them from regions where they would unnecessarily increase the distance between pixel circuits and degrade resolution.
2Object-affected harmful factors
If guard traces are disposed to protect pixel circuits, then electromagnetic interference is reduced, but the symmetry and spacing of pixel circuits is disrupted
Solution Approach 1:
The patent strategically positions guard traces asymmetrically relative to pixel circuit structures, placing them at specific boundaries where electromagnetic interference protection is most needed while minimizing their impact on overall symmetry. This asymmetric placement allows the design to maintain spacing regularity and symmetry where critical for display quality while providing necessary electromagnetic protection.
Solution Approach 2:
The patent uses connecting guard traces as intermediaries that link guard trace structures across different regions. These connecting traces enable electromagnetic interference protection to extend continuously across pixel circuit boundaries without creating abrupt spacing variations or symmetry disruptions, acting as mediators that balance protection requirements with structural regularity.
3Measurement precision
If the distance between pixel circuits is reduced to improve resolution, then more pixels fit in the same area, but electromagnetic interference between adjacent circuits increases
Solution Approach 1:
The patent segments the display device into distinct regions separated by guard traces at critical boundaries. By dividing the overall structure into isolated zones using strategically placed guard traces, the design enables reduced spacing between pixel circuits within each segment while preventing electromagnetic interference from propagating across segments, thus achieving high resolution without excessive interference.
Solution Approach 2:
The patent employs connecting guard traces as intermediary structures that bridge guard trace regions across adjacent pixel circuit structures. These intermediary traces provide continuous electromagnetic shielding at the boundaries between densely packed pixel circuits, enabling reduced spacing for higher resolution while maintaining electromagnetic interference protection through the connecting trace network.
Data Source
AI summary
A display device includes: a first pixel circuit structure divided into a first area and a second area, a first guard trace electrically connected to the first area of the first pixel circuit structure, a second guard trace electrically connected to the second area of the first pixel circuit structure, a second pixel circuit structure adjacent to the first pixel circuit structure in a second direction, divided into a third area extending from the first area and a fourth area adjacent to the third area, and symmetrical to the first pixel circuit structure; a third guard trace electrically connected to the third area of the second pixel circuit structure, and a fourth guard trace electrically connected to the fourth area of the second pixel circuit structure.


