Pixel Memory Shielding Layout for Low-PLS Solid-State Imaging
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Solution Overview
Problem
In solid-state imaging devices, securing a potential gradient between the photoelectric conversion part and the memory part while minimizing light leakage to the memory part is challenging due to the need for a light shielding part, which can either increase the distance between these components or lead to parasitic light sensitivity (PLS) issues.
Innovation Solution
A solid-state imaging device with a pixel array that includes a photoelectric conversion part, a memory part, and three transfer transistors connected in series, along with a light shielding part that covers the memory part and has an opening between the photoelectric conversion part and the substrate front surface, allowing for efficient charge transfer while minimizing light leakage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If the memory part is arranged away from the opening in the light shielding part, then light leakage to the memory part is reduced, but the distance between the photoelectric conversion part and the memory part increases making it difficult to secure a potential gradient of the transfer transistor
Solution Approach 1:
The patent introduces a third dimension by embedding the photoelectric conversion part into the semiconductor substrate. This vertical arrangement allows the light shielding part with its opening to be positioned on the substrate surface while the photoelectric conversion part extends below the surface, effectively separating the optical path from the charge transfer path and resolving the spatial conflict between minimizing light leakage and maintaining potential gradient.
Solution Approach 2:
The photoelectric conversion part is embedded within the semiconductor substrate, nesting the functional elements in a hierarchical structure. The opening in the light shielding part is positioned to allow light to reach the embedded photoelectric conversion part while the memory part can be arranged at an optimal distance for charge transfer, with the substrate structure providing the nested containment that resolves the spatial contradiction.
2Reliability
If the distance between the photoelectric conversion part and the memory part is shortened to secure the potential gradient, then the potential gradient is maintained, but light leakage to the memory part increases causing parasitic light sensitivity deterioration
Solution Approach 1:
By moving the photoelectric conversion part into the substrate depth (third dimension), the patent creates spatial separation between the light entry path (through the opening on the surface) and the charge transfer path. This allows the memory part to be positioned close to the photoelectric conversion part for maintaining potential gradient while the light shielding structure prevents light from reaching the memory part, thus eliminating parasitic light sensitivity.
3Object-affected harmful factors
If a light shielding part is provided to reduce light leakage, then light leakage is reduced, but an opening must be provided to secure connection between transfer transistor and photoelectric conversion part
Solution Approach 1:
The light shielding part is designed with an opening that serves dual functions: it allows light to reach the embedded photoelectric conversion part while simultaneously providing the necessary connection path for the transfer transistor gate. This multi-functionality eliminates the need for separate openings or additional structural elements, reducing overall device complexity while maintaining light leakage reduction.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively suppresses the deterioration of parasitic light sensitivity (PLS) by allowing the memory part to be arranged away from the opening, reducing light leakage and improving the potential gradient, thus enhancing the imaging device's performance.
Implementation Method 1
a photoelectric conversion part embedded away from a substrate front surface of a semiconductor substrate
Implementation Method 2
a light shielding part that covers a portion of the memory part facing a substrate rear surface side of the semiconductor substrate
Data Source
AI summary
A solid-state imaging device includes a pixel array having a plurality of pixels. Each of the plurality of pixels includes a photoelectric conversion part embedded away from a substrate front surface of a semiconductor substrate, a memory part that holds a charge generated in the photoelectric conversion part, a first transfer transistor, a second transfer transistor, and a third transfer transistor connected in series between the photoelectric conversion part and the memory part, an accumulation part that accumulates the charge transferred from the memory part, and a light shielding part that covers a portion of the memory part facing a substrate rear surface side of the semiconductor substrate and has an opening between the photoelectric conversion part and the substrate front surface.