Display Pixel Circuit Overlap Layout for Gate Voltage Stabilization
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Solution Overview
Problem
The kickback voltage characteristics in organic light-emitting display devices are affected by the replacement of PMOS transistors with NMOS transistors, leading to potential excessive reduction of the gate electrode voltage.
Innovation Solution
The display device incorporates a conductive pattern that overlaps scan lines, including a stem part and branch parts, with specific transistor configurations to manage parasitic capacitance and prevent excessive gate electrode voltage reduction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If NMOS transistors replace PMOS transistors in the display device, then device performance may be improved, but kickback voltage characteristics change causing excessive gate electrode voltage reduction
Solution Approach 1:
A conductive pattern is introduced as an intermediary element between the scan lines and the gate electrode of the first transistor. This conductive pattern includes a stem part extending in one direction and a branch part branching from the stem part and overlapping the first scan line, creating parasitic capacitance that compensates for the kickback voltage effect and stabilizes the gate electrode voltage.
Solution Approach 2:
The invention changes the electrical parameters of the circuit by introducing the conductive pattern with specific geometric configuration (stem part and branch part). This modifies the parasitic capacitance characteristics of the circuit, thereby adjusting the kickback voltage compensation mechanism to prevent excessive gate electrode voltage reduction.
2Productivity
If transistors are used to supply driving current to the light-emitting diode, then the display device can operate, but parasitic capacitance causes kickback voltage that reduces gate electrode voltage excessively
Solution Approach 1:
The conductive pattern serves as a mediator that intentionally introduces controlled parasitic capacitance through its stem part and branch part configuration. This compensates for the harmful parasitic capacitance effects by creating a balancing capacitive coupling between the scan lines and the gate electrode.
Solution Approach 2:
The invention converts the harmful kickback voltage effect caused by parasitic capacitance into a beneficial compensation mechanism. By strategically placing the conductive pattern with specific geometry, the parasitic capacitance that would normally cause voltage reduction is transformed into a voltage stabilization mechanism.
3Device complexity
If a simple conductive pattern is used, then device complexity is reduced, but insufficient voltage stabilization occurs
Solution Approach 1:
The conductive pattern is segmented into distinct functional parts: a stem part extending in one direction and a branch part branching from the stem part. This segmentation allows each part to serve a specific function in creating the desired parasitic capacitance distribution for effective voltage stabilization.
Solution Approach 2:
The conductive pattern employs asymmetric geometry where the branch part branches from the stem part at a specific angle and extends in a different direction. This asymmetric configuration optimizes the parasitic capacitance coupling with the first scan line while maintaining manufacturing simplicity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively stabilizes the gate electrode voltage, reducing leakage and enhancing the operational reliability of the display device.
Implementation Method 1
the conductive pattern overlaps the first scan line and the second scan line... a first parasitic capacitor formed between the gate electrode of the second transistor and the gate electrode of the first transistor; and a second parasitic capacitor formed between the gate electrode of the third transistor and the gate electrode of the first transistor
Data Source
AI summary
A display device including a light-emitting diode, a first transistor, a second transistor, a data line connected to the second transistor and configured to transmit a data signal, a third transistor, a first signal line connected to a gate electrode of the second transistor and configured to transmit a first signal, a second signal line connected to a gate electrode of the third transistor and configured to transmit a second signal, and a connect portion connected to a gate electrode of the first transistor and an electrode of the third transistor, in which the connect portion overlaps the first signal line and the second signal line, and an overlapping area between the connect portion and the first signal line is different from an overlapping area between the connect portion and the second signal line.