Pixel Circuit Precompensation for Stable Luminance at High Refresh
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Solution Overview
Problem
Display devices face challenges in accurately compensating for data voltage due to varying threshold voltages of driving transistors, especially at higher resolutions and frequencies, leading to inconsistent luminance and potential image quality issues.
Innovation Solution
The display device incorporates a specific pixel configuration with multiple transistors and capacitors, along with a gate driver that provides tailored gate signals to accurately compensate for threshold voltages, ensuring constant luminance across different driving frequencies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the resolution and driving frequency of the display device are increased, then the image quality and refresh rate are improved, but the data writing period becomes narrower and data voltage compensation becomes insufficient
Solution Approach 1:
The pixel circuit is divided into multiple functional blocks with separate transistors for different operations: a first transistor for data writing, a second transistor for threshold voltage compensation, and a third transistor for maintaining compensation voltage. This segmentation allows each transistor to be optimized for its specific function, enabling sufficient compensation time even at high driving frequencies.
Solution Approach 2:
The compensation voltage corresponding to the threshold voltage is written into the pixel circuit in advance during a compensation period before the data writing period. This preliminary action ensures that when data writing occurs, the compensation is already in place, allowing the narrow data writing period at high refresh rates to still achieve accurate compensation.
2Measurement precision
If the data writing period is narrowed to support higher resolution, then the resolution is improved, but the data voltage may not be appropriately compensated
Solution Approach 1:
Threshold voltage compensation is performed in advance during a dedicated compensation period before data writing. This preliminary compensation action allows the subsequent data writing period to be shortened for high resolution without compromising compensation accuracy.
Solution Approach 2:
The circuit is segmented into separate transistors for compensation (second transistor) and data writing (first transistor), allowing independent optimization of timing for each function. The compensation transistor can operate during a longer compensation period while the data writing transistor operates during the shorter high-speed data writing period.
3Device complexity
If a simple pixel circuit is used, then the device complexity is reduced, but the ability to compensate for threshold voltage variations is insufficient
Solution Approach 1:
The pixel circuit is segmented into specialized transistors: a first transistor for data writing, a second transistor for threshold voltage compensation, and a third transistor for maintaining compensation voltage. This segmentation provides reliable threshold voltage compensation while keeping each transistor's function simple and well-defined.
Solution Approach 2:
A fourth transistor is introduced as an intermediary element to control the connection between the storage capacitor and the power line. This intermediary transistor enables precise control of the compensation voltage storage, improving reliability without requiring complex circuitry in the main signal path.
Data Source
AI summary
A display device is disclosed that includes a pixel. The pixel includes a first transistor connected between a second node and a third node and including a gate electrode connected to a first node. A first capacitor is formed between the first node and a fourth node. A second capacitor is formed between the fourth node and a first power line. A second transistor is connected between a data line and the fourth node. An eighth transistor is connected between the first power line and the second node. A ninth transistor is connected between the second node and a bias power line. A sixth transistor is connected between the third node and a fifth node. A light emitting element is electrically connected between the fifth node and a second power line. A gate electrode of the eighth transistor and a gate electrode of the sixth transistor are connected to different gate lines.