Pixel Readout Circuit Current Smoothing for CMOS Image Sensors
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Solid-state image pickup devices, such as CMOS image sensors, face challenges with current concentration and power supply fluctuations during high-speed parallel processing, which can degrade image quality and are difficult to address with reduced external capacitance in miniaturized devices like portable cameras.
Innovation Solution
The implementation of a pixel signal read-out circuit with multiple comparators and counters, where each counter has a different operation period, and alternates between up-count and down-count operations, to smooth current consumption and stabilize power supply fluctuations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If parallel processing is performed at high speed to increase productivity, then reading out speed is improved, but current concentration and power supply fluctuations occur which degrade image quality
Solution Approach 1:
The pixel array is divided into multiple blocks, and the read-out circuit processes different blocks at different times through sequential scanning. This segmentation of the processing timeline prevents simultaneous operation of all pixels, thereby reducing current concentration while maintaining high-speed readout capability through efficient parallel processing within each block.
Solution Approach 2:
The read-out circuit employs periodic scanning across different pixel blocks in a systematic sequence. By organizing the readout process into periodic cycles where different blocks are accessed in turn, the system achieves high throughput while distributing current consumption over time, preventing power supply fluctuations that would degrade image quality.
2Volume of moving object
If external capacitance is reduced for miniaturization, then device size is decreased, but ability to address power supply fluctuations becomes more difficult
Solution Approach 1:
The pixel array is divided into multiple blocks, and the read-out circuit processes different blocks at different times through sequential scanning. This segmentation of the processing timeline prevents simultaneous operation of all pixels, thereby reducing current concentration while maintaining high-speed readout capability through efficient parallel processing within each block.
Solution Approach 2:
The read-out circuit employs periodic scanning across different pixel blocks in a systematic sequence. By organizing the readout process into periodic cycles where different blocks are accessed in turn, the system achieves high throughput while distributing current consumption over time, preventing power supply fluctuations that would degrade image quality.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach alleviates current concentration and stabilizes power supply fluctuations, reducing the need for external capacitance and enhancing image quality without increasing circuit size, even in miniaturized devices.
Implementation Method 1
The photodiode 11 photoelectrically converts an incident light into an electric charge (in this case, an electron) having an amount which corresponds to an amount of the incident light.
Data Source
AI summary
A solid-state image pickup device includes a pixel array including a plurality of pixels arranged in a matrix, and a pixel signal read-out circuit for reading out a pixel signal from the pixel array in units of a plurality of pixels. The pixel signal read-out circuit includes a plurality of comparators and a plurality of counters. The comparators are disposed to correspond to a column of the pixels, and compare a read-out signal potential and a reference voltage to generate a determination signal and output the determination signal. The counters are controlled by outputs of the comparators. Each of the counters is configured to count a comparison time of a corresponding comparator of the comparators. The counters have a different operation period for each one or a plurality of columns.