Reconfigurable Pixel Detector Readout for SPC and Charge Integration
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Solution Overview
Problem
Current photon science detectors face challenges in varying photon rates, limited space for electronics, and the need for flexibility between single photon counting and charge integrating capabilities, leading to the requirement of multiple detector systems and complex operations.
Innovation Solution
A dual mode detector system that can switch between single photon counting and charge integrating modes, utilizing reconfigurable analogue chains and logic/counter circuits to minimize space and power consumption, while allowing both modes of operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If separate single photon counting and charge integrating detector systems are used to cover different application ranges, then the entire range of applications can be covered, but the device complexity and number of detector systems required increases
Solution Approach 1:
The readout chip is designed with reconfigurable electronics that can operate in both single photon counting mode and charge integrating mode, allowing a single detector system to cover the entire range of applications. The pixel circuitry includes switchable components and configurable logic that enable the same physical detector to adapt its functionality based on the required measurement mode, eliminating the need for separate specialized detector systems.
Solution Approach 2:
The detector system incorporates dynamic reconfiguration capabilities where the readout mode can be changed during operation. Control logic and switching mechanisms allow the detector to transition between single photon counting and charge integrating modes based on real-time experimental requirements, providing flexibility without requiring physical reconfiguration or multiple fixed-mode detectors.
2Adaptability or versatility
If multiple independent detector systems are implemented to cover varying photon rates and modes, then all measurement requirements can be satisfied, but the space for electronics and power consumption per pixel increases
Solution Approach 1:
A single integrated readout chip design incorporates both single photon counting and charge integrating capabilities within the same pixel circuitry. By sharing common components such as amplifiers, discriminators, and readout logic between the two modes, the electronics area per pixel is minimized while still providing full functionality for both detection modes.
Solution Approach 2:
The patent merges the electronics for single photon counting and charge integrating modes into a unified circuit architecture. Common functional blocks are shared between modes, and switching mechanisms allow the same hardware resources to be dynamically allocated to different operational modes, thereby reducing the total electronic component count and space requirements per pixel.
3Adaptability or versatility
If separate single photon counting and charge integrating detector systems are used, then the appropriate mode can be selected for each application, but the power consumption per pixel increases
Solution Approach 1:
The readout chip implements a unified power-efficient architecture where the same electronic components serve both single photon counting and charge integrating modes. By eliminating redundant circuitry and using shared functional blocks, the overall power consumption per pixel is reduced while maintaining the ability to select the appropriate detection mode for each application.
Solution Approach 2:
The patent combines the power consumption sources for both detection modes into a single optimized power distribution system. Common analog and digital circuits are shared between modes, reducing total power requirements. The control logic intelligently activates only the necessary sub-circuits for the current operational mode, further minimizing instantaneous power consumption.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables efficient operation in both modes, reducing the need for multiple detector systems and minimizing power consumption, while maintaining high spatial resolution and flexibility for different applications.
Implementation Method 1
semiconductor sensors with flip-chip (bump) bonded readout chips
Data Source
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AI summary
Presently the pixel array detectors are read out employing a front-end chip (also called application specific integrated circuit, ASIC). Depending on the application and its requirements, an ASIC implementing either a single photon counting architecture (SPC) or a charge integrating architecture (CI) is used resulting in two different detector systems. Examples are the Eiger® single photon counting and the Jungfrau® charge integrating pixel detector systems (with a pixel size of 75 microns) from PSI. Therefore, depending on the application, one of the two detector systems is used. Since beamlines at synchrotrons cover a wide range of applications an exchange of the detector system might be necessary between different beamtimes and represents due to the complexity of the detector systems an error-prone operation and a loss of beamtime. This patent discloses the basic architecture of the present invention, representing a detector system which can be switched between single photon counting and charge integrating mode depending on the application, the photon flux and energy. Although the space for electronics in a pixel or strip detector system is very limited (as each channel is limited by the pixel size), the reconfiguration of the analogue chain and the logic/counter in this smart way yields to have a detector system allowing both modes of operation and, therefore, effectively combining the Eiger and Jungfrau characteristics in one single detector. Depending on the application, the flux and the photon energy, the operator is enabled to switch between single photon counting and charge integrating mode of operation.