Pixel Reset Voltage Boosting via Row Transistor Capacitance
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Solution Overview
Problem
Conventional CMOS imagers require additional supply voltage boosting circuits to achieve maximum voltage swing at the storage region, increasing size, power consumption, design complexity, and costs.
Innovation Solution
The row transistor is electrically coupled to boost the reset voltage applied to the storage region, eliminating the need for a supply voltage boosting circuit by using a capacitance or parasitic capacitance to provide a voltage boost during the readout process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If a supply voltage boosting circuit is used to achieve maximum voltage swing at the storage region, then the voltage swing is improved, but the device complexity, size, power consumption, and cost increase
Solution Approach 1:
The patent extracts and eliminates the separate supply voltage boosting circuit from the pixel design. Instead of using an external boosting circuit, the invention utilizes the inherent row select transistor and its associated capacitance to generate the necessary voltage swing at the storage region, thereby removing the complex boosting circuitry while maintaining the required voltage characteristics
Solution Approach 2:
The pixel circuit performs its own voltage boosting function using the row select transistor and capacitance already present in the circuit. The row select transistor, when activated, automatically generates the voltage swing needed at the storage region through the coupling capacitance, making the circuit self-sufficient and eliminating the need for external boosting components
2Strength
If a supply voltage boosting circuit is used to achieve maximum voltage swing at the storage region, then the voltage swing is improved, but the power consumption increases
Solution Approach 1:
By removing the separate boosting circuit, the patent eliminates the additional power consumption that would be required to operate such a circuit. The voltage swing is achieved using the existing row select transistor and capacitance, which are already part of the normal pixel operation and do not require additional power resources
Solution Approach 2:
The pixel circuit generates its own voltage swing using existing components during normal row selection operations. Since the row select transistor and capacitance are already activated during standard pixel readout, no additional power is consumed specifically for voltage boosting - the boosting function is achieved as a byproduct of normal operation
3Strength
If a supply voltage boosting circuit is used to achieve maximum voltage swing at the storage region, then the voltage swing is improved, but the manufacturing cost increases
Solution Approach 1:
The patent removes the need for additional boosting circuit components that would require separate fabrication processes and increase manufacturing complexity. By using only the standard row select transistor and capacitance already present in CMOS pixel fabrication, the design simplifies the manufacturing process and reduces production costs
Solution Approach 2:
The row select transistor and capacitance serve dual functions: they perform the standard row selection function and simultaneously generate the voltage swing needed at the storage region. This multi-functionality eliminates the need for dedicated boosting components, reducing the number of fabrication steps and lowering manufacturing costs
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the need for additional voltage boosting circuits, simplifying design, lowering power consumption, and decreasing costs while maintaining a maximum voltage swing for improved image signal processing.
Implementation Method 1
a capacitance coupled between the storage region and a source terminal of the row select transistor
Implementation Method 2
The capacitance may be provided by parasitic capacitance or by an added capacitor
Data Source
AI summary
A pixel cell in which a capacitance is coupled between a storage node and a row select transistor. The pixel cell utilizes a readout timing sequence between operation of a reset transistor and a row select transistor to boost a reset voltage.


