Digital Pixel Sensor Comparator Bank for Noise Mismatch Reduction

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current image sensors face challenges in reducing noise and mismatch between pixels and analog digital converters, leading to suboptimal performance and increased size.

Innovation Solution

A digital pixel sensor design incorporating a bank of comparators and counters that perform analog and digital signal processing, reducing noise by comparing pixel signals with a reference signal and latching count codes, thereby improving signal processing efficiency and reducing sensor size.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a conventional analog digital converter is used, then the pixel array can be converted to digital signals, but noise increases and performance deteriorates

Engineering Contradiction:
Improvesignal processing performanceVSAvoidnoise
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The analog digital converter is divided into multiple independent comparators (first comparator, second comparator, third comparator, fourth comparator) that process pixel signals in parallel. Each comparator independently compares pixel signals with reference signals, reducing the noise impact on the overall conversion process and improving signal processing performance.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Multiple comparators are merged into a single bank structure that shares common reference signals and processing resources. The comparators work together to process multiple pixel signals simultaneously, achieving noise reduction through combined processing while maintaining high conversion performance.

Inventive Principle:
Principle #5Merging (Combining)

2Reliability

If more comparators are added to reduce noise, then signal processing performance improves, but device size increases

Engineering Contradiction:
Improvesignal processing performanceVSAvoidsensor size
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The comparators in the bank are designed with universal functionality to process multiple types of pixel signals using the same reference signals and processing mechanisms. This multi-functionality allows the same hardware structure to handle different signal processing tasks, reducing the need for additional dedicated components and thereby controlling device size while maintaining improved noise performance.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively decreases noise and improves performance by enhancing signal processing capabilities, resulting in a more efficient and compact digital pixel sensor.

Implementation Method 1

Each of the pixels may include, for example, a photodiode (PD). The photodiode may serve to convert incident light into an electrical signal.

Methodology Applied
Scientific EffectPhotoelectric effect: Photoelectric Effect

Data Source

PatentUS11528440B2Digital pixel sensor and analog digital converter
Publication Date: 2022.12.13 SAMSUNG ELECTRONICS CO LTD
  • US11528440B2 patent drawing
  • US11528440B2 patent drawing
  • US11528440B2 patent drawing

AI summary

A digital pixel sensor for correcting and reducing a mismatch between a pixel and an analog digital converter provided. The digital pixel sensor includes a pixel array including a plurality of pixels; and a bank disposed on the pixel array. The bank includes: a plurality of comparators disposed on the plurality of pixels and configured to compare each of a plurality of pixel signals output from the plurality of pixels with a reference signal to output a plurality of comparison result signals; and a counter connected to the plurality of comparators, and configured to receive the plurality of comparison result signals and latch count code based on the plurality of comparison result signals.