Display Pixel Circuit With Dual-Function Storage Capacitor
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Solution Overview
Problem
Existing display devices face challenges in maintaining high-potential drive voltage without adding separate lines, leading to potential drops that affect display quality and lifespan.
Innovation Solution
A display device design that includes a storage capacitor connected between a fifth node and a first power line, allowing an on-bias stress voltage to be applied before light emission, thereby compensating for high-potential drive voltage drops and improving luminance uniformity and display quality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a separate line is added to compensate for high-potential drive voltage, then voltage stability is improved, but device complexity increases
Solution Approach 1:
The patent combines the compensation function into the existing storage capacitor structure by connecting its first electrode to the first power line. This merging approach allows voltage compensation without adding separate compensation lines, thus improving voltage stability while avoiding increased device complexity.
Solution Approach 2:
The storage capacitor is given a dual function: it serves both as a timing/control element and as a voltage compensation element by connecting its first electrode to the first power line. This multi-functionality eliminates the need for separate compensation circuitry, resolving the contradiction between reliability improvement and device complexity.
2Device complexity
If high-potential drive voltage is maintained without compensation, then device complexity is reduced, but display quality deteriorates due to voltage drops
Solution Approach 1:
The compensation function is merged into the existing storage capacitor structure, allowing voltage stabilization without adding complex separate compensation circuits. This maintains simple device architecture while improving display quality through voltage drop compensation.
3Reliability
If compensation circuitry is added to maintain high-potential drive voltage, then display quality is improved, but manufacturing complexity increases
Solution Approach 1:
The compensation function is integrated into the existing storage capacitor structure rather than adding separate compensation circuits. This merging approach simplifies manufacturing processes while achieving voltage stabilization and improved display quality.
Solution Approach 2:
The storage capacitor performs dual functions as both a timing element and a voltage compensation element. This multi-functionality eliminates the need for separate compensation circuitry, reducing manufacturing complexity while maintaining improved display quality.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution minimizes high-potential drive voltage drops by applying an on-bias stress voltage, enhancing display quality and lifespan through improved luminance uniformity and reduced flicker phenomena.
Implementation Method 1
a storage capacitor having a first electrode connected to the second node and a second electrode connected to a fifth node
Implementation Method 2
a light-emitting element configured to emit light by a drive current
Data Source
AI summary
A display device can include a display panel having a plurality of pixels disposed therein. Each of the plurality of pixels includes a light-emitting element configured to emit light by a drive current, a driving transistor disposed between a first node and a third node and configured to control the drive current flowing through the light-emitting element from a first power line through which a first power voltage is provided to a second power line through which a second power voltage is provided, a first transistor connected between the third node and a second node, a second transistor connected between a data line and the first node and configured to apply a data voltage to the first node, and a third transistor connected between the first power line and the first node and configured to apply the first power voltage to the first node.