Pixel Structure Vertical Conductive Layers Crosstalk Reduction
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Solution Overview
Problem
Liquid crystal displays (LCDs) face the issue of crosstalk effect due to parasitic capacitors, leading to insufficient voltage at pixel electrodes and abnormal color display, especially exacerbated by higher resolutions.
Innovation Solution
A pixel structure comprising three conductive layers - a first conductive layer coupled to a drain electrode, a second conductive layer coupled to a first voltage line, and a third conductive layer coupled to a second voltage line - are overlapped and separated, forming storage capacitors that prevent interference from parasitic capacitors, ensuring stable voltage and reducing crosstalk.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If multiple voltage lines are disposed in parallel to charge pixel electrodes, then data signals can be provided to pixel electrodes, but parasitic capacitors are generated causing crosstalk effect and voltage sharing
Solution Approach 1:
The patent transitions from a planar arrangement of voltage lines to a three-dimensional overlapping configuration. The first, second, and third voltage lines are arranged in different vertical layers with the first voltage line overlapping the second and third voltage lines in the vertical direction. This vertical stacking allows the conductive layers to be separated in space while maintaining electrical functionality, thereby reducing parasitic capacitance and crosstalk between parallel lines.
Solution Approach 2:
The patent introduces a fourth voltage line as an intermediary element. The fourth voltage line is disposed between the second and third voltage lines and is electrically connected to the second voltage line. This intermediary structure helps to shield and isolate the second and third voltage lines from each other, reducing the crosstalk effect and parasitic capacitance between them while maintaining the charging function.
2Manufacturing precision
If higher resolution is implemented, then display quality is improved, but crosstalk effect becomes more obvious due to increased parasitic capacitors
Solution Approach 1:
By arranging voltage lines in multiple vertical layers with overlapping configurations, the patent reduces the horizontal spacing requirements between lines. This enables higher pixel density and resolution while maintaining adequate electrical isolation between adjacent voltage lines through the vertical separation, thereby reducing crosstalk even at higher resolutions.
3Device complexity
If conventional parallel voltage line configuration is used, then device structure is simple, but parasitic capacitors cause voltage sharing and insufficient pixel electrode voltage
Solution Approach 1:
The patent employs a multi-layer overlapping configuration where the first voltage line is disposed in a first layer, the second voltage line is disposed in a second layer, and the third voltage line is disposed in a third layer. This vertical arrangement reduces parasitic capacitance between voltage lines by increasing spatial separation in the vertical dimension, thereby preventing voltage sharing and ensuring stable pixel electrode voltage without significantly increasing overall device complexity.
Solution Approach 2:
The fourth voltage line serves as a shielding intermediary between the second and third voltage lines. This intermediary layer reduces the electric field coupling between adjacent high-voltage lines, minimizing parasitic capacitance effects and ensuring more stable voltage delivery to pixel electrodes while maintaining a relatively compact structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration maintains pixel voltage stability, preventing crosstalk effects and ensuring normal display performance, even at higher resolutions without increasing the plane area of conductive layers.
Implementation Method 1
a first conductive layer coupled to a drain electrode of an active switch, a second conductive layer coupled to a first voltage line, and a third conductive layer coupled to a second voltage line. The first conductive layer, the second conductive layer and the third conductive layer are disposed to be overlapped and at a distance separated from each other
Data Source
AI summary
A pixel structure and a display panel are provided. Wherein, the pixel structure includes a first conductive layer, a second conductive layer and a third conductive layer. The first conductive layer is coupled to a drain electrode of an active switch. The second conductive layer is coupled to a first voltage line. The third conductive layer is coupled to a second voltage line. The first conductive layer, the second conductive layer and the third conductive layer are disposed to be overlapped and at a distance separated from each other. The first conductive layer, the second conductive layer and the third conductive layer are overlapped in a vertical space.


