Pixel Structure Vertical Circuit Stacking for Narrow Bezel Displays
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Solution Overview
Problem
The narrow bezel design in display panels is limited by the presence of peripheral circuits such as demultiplexers and test circuits, which hinder further reduction in bezel width.
Innovation Solution
The proposed solution involves a display panel structure where sub-pixel circuits and internal driving circuits are located on a different plane than the light-emitting modules, with multiplex and test control lines only extending to specific areas, allowing for the reduction of bezel width by relocating demultiplexers and test circuits to the active display area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of stationary object
If peripheral circuits (demultiplexers, test circuits) are placed in the peripheral area, then circuit functionality is ensured, but bezel width cannot be reduced further
Solution Approach 1:
The patent moves demultiplexers and test circuits from the peripheral area to the active area, utilizing the third dimension (vertical stacking) by placing circuits on different planes. The light-emitting module remains on the first plane while sub-pixel circuits and internal driving circuits are placed on a second plane, allowing peripheral functions to be integrated within the active display area without increasing bezel width.
Solution Approach 2:
The patent nests peripheral circuit functions within the active pixel structure by integrating demultiplexers and test circuits into individual pixel structures. Each pixel structure contains not only light-emitting elements but also sub-pixel circuits and internal driving circuits that perform previously peripheral functions, effectively hiding peripheral functionality within the nested pixel structure.
2Length of stationary object
If demultiplexers and test circuits are relocated to the active area, then bezel width is reduced, but circuit wiring complexity increases
Solution Approach 1:
The patent segments the display panel into different wiring areas: a test wiring area with test control lines, a multiplex wiring area with multiplex control lines, and a central area without internal driving circuits. This segmentation allows different control line types to be routed through dedicated paths, managing wiring complexity by organizing circuits into functional zones rather than distributing them uniformly.
Solution Approach 2:
The patent implements multiplex control lines that can serve multiple functions and multiple pixel structures. The multiplex wiring area uses shared control lines that can be dynamically assigned to different pixel rows or columns, reducing the total number of control lines needed compared to dedicated one-to-one wiring, thus managing wiring complexity through multi-functional routing.
3Length of stationary object
If sub-pixel circuits and internal driving circuits are placed on the same plane as light-emitting modules, then manufacturing is simpler, but bezel width cannot be reduced
Solution Approach 1:
The patent utilizes vertical stacking to place the light-emitting module on the first plane and sub-pixel circuits plus internal driving circuits on the second plane. This three-dimensional arrangement allows all necessary circuits to be integrated within the pixel area without extending the horizontal bezel width, achieving narrow bezel design through spatial optimization in the vertical dimension.
Data Source
AI summary
A pixel structure includes a light-emitting module, multiple sub-pixel circuits, and an internal driving circuit. The light-emitting module includes multiple sub-pixel light-emitting elements, and is disposed on a first plane. The multiple sub-pixel circuits are disposed on a second plane, and each of the multiple sub-pixel circuits is electrically connected with a corresponding one of the multiple sub-pixel light-emitting elements. The internal driving circuit is disposed on the second plane, and is electrically connected with one of the multiple sub-pixel circuits. The first plane is different from the second plane, and the multiple sub-pixel circuits and the internal driving circuit are located in a vertical projection projected by the light-emitting module onto the second plane.