Pixel TFT Circuit Layout With Shielding for Low-Power Displays
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Solution Overview
Problem
Display devices face challenges in high integration and power consumption due to the increasing number of thin-film transistors (TFTs) required for precise control of display elements, which affects their efficiency and performance.
Innovation Solution
A display device design that includes a pixel circuit with a thin-film transistor configuration featuring dual channel areas, sub-gate electrodes, and shielding layers to optimize the connection and operation of TFTs, reducing power consumption and enhancing integration while maintaining display quality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the number of TFTs is increased to precisely control display elements, then control precision is improved, but device complexity and power consumption increase
Solution Approach 1:
The patent divides a single TFT into multiple sub-TFTs (first sub-TFT and second sub-TFT) with separate gate electrodes (first gate electrode and second gate electrode) that can be independently controlled. This segmentation allows precise control of different pixel regions while maintaining manageable device complexity through modular architecture.
Solution Approach 2:
The patent introduces a vertical stacking dimension by placing multiple gate electrodes and semiconductor layers at different heights. The first gate electrode and second gate electrode are positioned at different vertical levels, enabling independent control along the vertical dimension while reducing lateral space requirements.
2Measurement precision
If the number of TFTs is increased to precisely control display elements, then control precision is improved, but power consumption increases
Solution Approach 1:
By segmenting the TFT into sub-TFTs with independent gate control, the patent enables selective activation of only the necessary sub-TFTs for each pixel region. This reduces overall power consumption compared to controlling entire pixels through single TFTs, while maintaining precise control capability.
Solution Approach 2:
The patent applies different gate control strategies to different regions of the pixel circuit. The first gate electrode controls the first sub-TFT for specific pixel regions, while the second gate electrode controls the second sub-TFT for other regions, allowing optimized power distribution based on local display requirements.
3Reliability
If shielding layers are added to reduce interference, then reliability is improved, but device complexity increases
Solution Approach 1:
The patent combines the shielding layer with existing structural elements of the TFT. The shielding layer is integrated into the gate electrode structure and semiconductor layer arrangement, providing electromagnetic interference protection without requiring completely separate shielding components, thus limiting the increase in device complexity.
Data Source
AI summary
A display device includes a pixel circuit disposed on a substrate, and a display element on the pixel circuit. The pixel circuit includes a first thin-film transistor comprising a first semiconductor layer and a first gate electrode insulated from the first semiconductor layer, a second thin-film transistor comprising a second semiconductor layer and a second gate electrode insulated from the second semiconductor layer, the second semiconductor layer being connected to the first semiconductor layer and the first gate electrode, a first shielding layer overlapping the second semiconductor layer, and a second shielding layer overlapping the second semiconductor layer and stacked on the first shielding layer.