Pixel Transistor Curved Channel Crosstalk Reduction

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Solution Overview

Problem

As the resolution of display devices increases, the line time for driving a single row decreases, leading to insufficient time for compensating the threshold voltage of a driving transistor, which can result in increased crosstalk between data lines and decreased capacitance, particularly when data demultiplexing is utilized.

Innovation Solution

A pixel structure is designed with a transistor having a first and second electrode in a column direction, a curved channel, and a capacitor overlapping the transistor, where the first and second data lines are arranged in columns, parallel to each other, and the respective locations of the electrodes in odd and even rows are opposite, with the capacitor positioned between the data lines and overlapping the channel, ensuring capacitance is maintained while reducing crosstalk.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If data demultiplexing is used to increase resolution, then the threshold voltage compensation time becomes insufficient, but using a single data line per row maintains simpler structure

Engineering Contradiction:
ImproveresolutionVSAvoidcompensation time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent divides the data lines into multiple parallel lines (first data line and second data line) to handle different row groups (odd rows and even rows). This segmentation allows simultaneous data writing to multiple rows, providing sufficient compensation time for each row while achieving high resolution display.

Inventive Principle:
Principle #1Segmentation

2Quantity of substance

If multiple data lines are arranged closely to increase pixel density, then capacitance is secured, but crosstalk between data lines increases

Engineering Contradiction:
ImprovecapacitanceVSAvoidcrosstalk
Core Design Contradiction:
Quantity of substanceVSObject-generated harmful factors

Solution Approach 1:

The patent employs asymmetric positioning of the first and second data lines relative to the transistor electrodes. The first data line overlaps the first electrode while the second data line overlaps the second electrode, creating an asymmetric arrangement that reduces capacitive coupling (crosstalk) between adjacent data lines while maintaining sufficient capacitance for signal integrity.

Inventive Principle:
Principle #4Asymmetry

3Ease of manufacture

If data lines overlap both electrodes of transistors to simplify routing, then manufacturing is easier, but crosstalk between data lines increases

Engineering Contradiction:
Improverouting simplicityVSAvoidcrosstalk
Core Design Contradiction:
Ease of manufactureVSObject-generated harmful factors

Solution Approach 1:

The patent implements local quality differentiation by having the first data line overlap only the first electrode and the second data line overlap only the second electrode of respective transistors. This localized overlap strategy simplifies routing while minimizing crosstalk, as each data line interacts with only one electrode rather than both electrodes of multiple transistors.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS10103214B2Display device
Publication Date: 2018.10.16 SAMSUNG DISPLAY CO LTD
  • US10103214B2 patent drawing
  • US10103214B2 patent drawing
  • US10103214B2 patent drawing

AI summary

A display device is disclosed. In one aspect, the device includes a plurality of pixels arranged in rows and columns, each pixel including a transistor that includes first and second electrodes in a column direction, and a channel curved between the first and second electrodes, and a capacitor overlapping the transistor. The device also includes a first data line connected to at least one first pixel in an odd row of the pixels arranged in the columns, and overlapping a first electrode of a transistor of the first pixel and a second data line connected to at least one second pixel in an even row of the pixels arranged in the columns, and overlapping a first electrode of a transistor of the second pixel. The first and second data lines are arranged in the columns and are parallel to one another.