Pixel Transistor Layout With Charge Injection Layers for Voltage Stability

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Solution Overview

Problem

Display devices face challenges in maintaining stable voltage within pixels due to leakage currents at the gate electrode of transistors, which affects the overall performance and efficiency of light-emitting display devices.

Innovation Solution

The implementation of a display device design that includes a first transistor controlling the driving current, a second transistor supplying data voltage to the gate electrode, and a series connection of first-third and second-third transistors with differential charge injection layers to reduce leakage current and maintain voltage stability, along with additional transistors and charge injection layers for initialization and reference voltages.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a conventional transistor structure is used in the display device, then the device complexity is low, but leakage current flows at the gate electrode causing unstable voltage

Engineering Contradiction:
Improvevoltage stabilityVSAvoidtransistor configuration
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The third transistor is divided into two separate transistors (third and fourth transistors) connected in series between the gate electrode and drain electrode of the first transistor. This segmentation allows for better control of leakage current paths while maintaining voltage stability in the pixel.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Charge injection layers are introduced as intermediary elements between the transistor components. These charge injection layers actively manage charge distribution to prevent leakage current at the gate electrode, serving as mediators that stabilize voltage without requiring complete redesign of the transistor structure.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If charge injection layers are added to prevent leakage current, then voltage stability improves, but the manufacturing process becomes more complex

Engineering Contradiction:
Improveleakage current preventionVSAvoidmanufacturing process
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The charge injection layers modify the electrical parameters (charge distribution, voltage levels) in critical regions of the transistor structure. By changing these parameters locally, the patent achieves leakage current prevention through controlled charge injection rather than through structural complexity alone.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If the third and fourth transistors are connected in series, then leakage current is reduced, but the area occupied by the transistor increases

Engineering Contradiction:
Improveleakage current controlVSAvoidtransistor area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent utilizes vertical stacking and three-dimensional arrangement of the third and fourth transistors connected in series. By transitioning from a purely planar layout to a multi-dimensional configuration, the patent achieves effective leakage current control while minimizing the increase in occupied area through efficient spatial utilization.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS20240332321A1Display device and method of manufacturing the same
Publication Date: 2024.10.03 SAMSUNG DISPLAY CO LTD
  • US20240332321A1 patent drawing
  • US20240332321A1 patent drawing
  • US20240332321A1 patent drawing

AI summary

A display device includes a light emitting element disposed on a substrate, a first transistor which controls a driving current flowing in the light emitting element, a second transistor which supplies a data voltage to a gate electrode of the first transistor, a first-third transistor and a second-third transistor connected in series between the gate and drain electrodes of the first transistor, a first charge injection layer adjacent to a drain electrode of the first-third transistor electrically connected to the gate electrode of the first transistor on a semiconductor region of the first-third transistor, and a second charge injection layer adjacent to a source electrode of the second-third transistor integrally formed with the drain electrode of the first transistor on a semiconductor region of the second-third transistor. A charge injection area of the first charge injection layer is greater than a charge injection area of the second charge injection layer.