Mixed-Semiconductor Pixel Transistors for High-Resolution Displays
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Solution Overview
Problem
High-resolution display devices face challenges in maintaining adequate driving voltage ranges due to decreased driving current and increased pixel count, particularly when using transistors with oxide semiconductor active layers, which require longer channel regions and larger area occupation, making it difficult to implement high-resolution displays with a large number of pixels per unit area.
Innovation Solution
The display device incorporates transistors with different gate capacitances by varying the distance between the active layer and the gate electrode, using polysilicon for some transistors and oxide semiconductors for others, and adjusting the thickness and material of gate insulating layers to secure element characteristics, allowing for a wider driving voltage range and efficient pixel density.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If oxide semiconductor transistors are used in high-resolution display devices, then element characteristics can be secured, but the transistor area increases due to longer channel regions required
Solution Approach 1:
The patent applies different gate insulating layer configurations to different transistor types within the same display device. Driving transistors use a first gate insulating layer with specific thickness and material properties, while switching transistors use a second gate insulating layer with different properties. This local differentiation allows each transistor type to be optimized for its specific function, enabling oxide semiconductor transistors to achieve adequate element characteristics without uniformly increasing all transistor dimensions across the display device.
2Measurement precision
If the number of pixels is increased for high-resolution displays, then display resolution is improved, but the driving current of each pixel decreases
Solution Approach 1:
The patent modifies the gate insulating layer parameters (thickness, material composition) to change the electrical characteristics of the transistors. By adjusting the gate insulating layer thickness and dielectric constant, the patent optimizes the driving current characteristics to maintain adequate current levels even as pixel density increases for high-resolution displays.
3Quantity of substance
If the gate insulating layer thickness is reduced to increase pixel density, then more pixels can be fitted in the same area, but the element characteristics of the transistors deteriorate
Solution Approach 1:
The patent employs composite gate insulating layer structures combining multiple dielectric materials with different properties. This composite approach allows the gate insulating layer to provide adequate electrical insulation and transistor element characteristics even when the overall thickness is reduced to accommodate higher pixel densities in the display device.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the display device to maintain a wide driving voltage range and secure excellent element characteristics, facilitating high-resolution displays with a larger number of pixels in a smaller area, even when using oxide semiconductor transistors.
Implementation Method 1
a gate insulating layer between the gate electrode and the active layer, and a capacitor electrode overlapping the gate electrode with the gate insulating layer therebetween
Data Source
AI summary
A display device is provided. The display device comprises a substrate, a first buffer layer on the substrate, a first semiconductor layer on the first buffer layer and including a first active layer, a first gate insulating layer on the first semiconductor layer and the first buffer layer and covering the first active layer, a first conductive layer on the first gate insulating layer and including a first gate electrode, a second conductive layer on the first conductive layer and including a first source/drain electrode, a first interlayer insulating layer on the first conductive layer, a second semiconductor layer on the first interlayer insulating layer and including a second active layer, a second gate insulating layer on the second semiconductor layer and covering the second active layer, and a third conductive layer on the second gate insulating layer and including a second gate electrode and a second source/drain electrode, wherein the first gate insulating layer and the second gate insulating layer include different insulating materials.