Pixel Trench Doping Profile to Reduce Dark Current and Color Mixture
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Solution Overview
Problem
Existing photoelectric conversion apparatuses, such as solid-state image pickup devices, face challenges in suppressing dark current around trenches due to stress-induced defects and insufficient insulation, leading to color mixture between adjacent pixels.
Innovation Solution
A photoelectric conversion apparatus with a semiconductor substrate featuring a trench isolated by a second conductivity type impurity region with a boron concentration profile that decreases monotonically from the surface to the trench bottom, where the impurity concentration is higher near the trench corner and lower deeper inside, reducing stress and dark current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If a trench with high aspect ratio is formed between pixels to prevent color mixture, then color mixture suppression is improved, but dark current increases due to dangling bonds generated by RIE damages on the trench surface
Solution Approach 1:
The patent converts the harmful effect of RIE-induced dangling bonds into a beneficial structure by forming a P type impurity diffusion region that surrounds the trench outer circumference. This impurity region passivates the damaged surface, transforming the harmful damaged interface into a useful dark current suppression structure.
Solution Approach 2:
The patent applies local quality by creating a P type impurity diffusion region specifically at the trench outer circumference where RIE damages occur. This localized impurity region targets the specific area with dangling bonds, providing passivation exactly where needed without affecting other regions.
2Object-generated harmful factors
If a P type impurity diffusion region is formed to surround the trench outer circumference to suppress dark current, then dark current suppression is improved, but stress-induced defects may occur due to lattice mismatch between P type region and surrounding N type regions
Solution Approach 1:
The patent applies parameter changes by creating a graded impurity concentration profile within the P type impurity diffusion region. The impurity concentration decreases from the trench interface toward the outer circumference, which gradually transitions the lattice structure and reduces stress concentration, thereby minimizing stress-induced defects while maintaining dark current suppression.
Solution Approach 2:
The patent uses local quality by varying the impurity concentration within the P type diffusion region based on the local stress conditions. The higher impurity concentration near the trench provides strong passivation, while the gradually decreasing concentration toward the outer region reduces lattice mismatch stress, creating an optimized local structure at each position.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The described boron concentration profile effectively reduces dark current around the trench, enhancing the suppression of color mixture and improving the overall performance of the photoelectric conversion apparatus.
Implementation Method 1
a first implanting step of doping a sidewall of the trench with an impurity of a second conductivity type after the first etching step, a second implanting step of doping the sidewall of the trench with an impurity of a second conductivity type after the second etching step
Data Source
AI summary
A photoelectric conversion apparatus includes a semiconductor substrate having a first surface and a second surface, a plurality of photoelectric conversion regions including an impurity of a first conductivity type and arranged at the semiconductor substrate, a trench arranged between the photoelectric conversion regions, an impurity region including an impurity of a second conductivity type opposite to the first conductivity type and arranged along a sidewall of the trench, and a first film arranged at the first surface of the semiconductor substrate and the sidewall of the trench. The impurity region includes a first region with an impurity concentration of a first concentration and a second region with an impurity concentration of a second concentration lower than the first concentration, and a distance between the first surface and the first region is smaller than a distance between the first surface and the second region.