Pixel Unit Half Row Reading Design for Chip Area Reduction

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Solution Overview

Problem

Current imaging technologies face challenges in achieving high-quality images with reduced hardware complexity, particularly in portable devices, where there is a need for simplified pixel peripheral control circuits and reduced power consumption and chip area.

Innovation Solution

The implementation of a pixel unit design featuring a first and second pixel sub-portion for half row reading, each comprising photodiodes, transfer transistors, reset transistors, and source follower transistors, with shared reset and row select signals, and optionally including capacitors and gain control transistors, to optimize pixel signal processing and reduce circuit complexity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If a conventional pixel design with full row reading is used, then complete pixel signal processing is achieved, but chip area and power consumption increase

Engineering Contradiction:

Improvechip areaVSAvoidpixel signal processing efficiency

Core Design Contradiction:

Area of stationary objectVSProductivity

Solution Approach 1:

The pixel array is divided into two independent sub-arrays (first pixel sub-array and second pixel sub-array), each handling half of the rows. This segmentation allows each sub-array to have its own dedicated readout circuitry, reducing the overall chip area required for peripheral circuits while maintaining complete pixel signal processing capability through parallel operation of both sub-arrays

Inventive Principle:

Principle #1Segmentation

2Use of energy by moving object

If a conventional pixel design with full row reading is used, then complete pixel signal processing is achieved, but power consumption increases

Engineering Contradiction:

Improvepower consumptionVSAvoidpixel signal processing efficiency

Core Design Contradiction:

Use of energy by moving objectVSProductivity

Solution Approach 1:

The pixel array is divided into two independent sub-arrays (first pixel sub-array and second pixel sub-array), each handling half of the rows. This segmentation allows each sub-array to have its own dedicated readout circuitry, reducing the overall power consumption while maintaining complete pixel signal processing capability through parallel operation of both sub-arrays

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Adjacent pixel units within each sub-array share common readout circuits (such as column selection circuits and signal processing circuits). This merging of resources reduces the total number of redundant circuits needed, thereby reducing power consumption while maintaining full pixel signal processing capability

Inventive Principle:

Principle #5Merging (Combining)

3Device complexity

If a conventional pixel design with full row reading is used, then complete pixel signal processing is achieved, but pixel peripheral control circuit structure becomes complex

Engineering Contradiction:

Improvepixel peripheral control circuit structureVSAvoidpixel signal processing efficiency

Core Design Contradiction:

Device complexityVSProductivity

Solution Approach 1:

The pixel array is divided into two independent sub-arrays (first pixel sub-array and second pixel sub-array), each handling half of the rows. This segmentation allows each sub-array to have its own dedicated readout circuitry, reducing the overall complexity of the pixel peripheral control circuit structure while maintaining complete pixel signal processing capability through parallel operation of both sub-arrays

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Adjacent pixel units within each sub-array share common readout circuits (such as column selection circuits and signal processing circuits). This merging of resources reduces the total number of redundant circuits needed, thereby simplifying the pixel peripheral control circuit structure while maintaining full pixel signal processing capability

Inventive Principle:

Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design enhances image quality by reducing chip area and power consumption while maintaining efficient pixel signal processing, suitable for applications in portable devices and various imaging systems.

Implementation Method 1

one or more transfer transistors each coupled to a floating diffusion, for transferring the charges generated by the one or more photodiodes in response to incident light during an exposure period

Methodology Applied

Scientific EffectPhotoelectric Effect: Photoelectric Effect

Data Source

PatentUS11438530B2Pixel unit with a design for half row reading, an imaging apparatus including the same, and an imaging method thereof

Publication Date: 2022.09.06 SMARTSENS TECH (HK) CO LTD

AI summary

Disclosed are a pixel unit, and an imaging method and apparatus thereof. The pixel has a first and a second pixel sub-portion each comprising one or more photodiodes; one or more transfer transistors each coupled to a floating diffusion, for transferring the charges generated by the one or more photodiodes in response to incident light during an exposure period and accumulated in the photodiode during said exposure period respectively to the floating diffusion; a reset transistor; and a source follower transistor coupled to the floating diffusion for amplifying and outputting the pixel signal of the floating diffusion. In some embodiments, the pixel further includes a capacitor and a gain control transistor.