Pixel Unit Signal Line Reduction for Display Aperture Ratio

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Solution Overview

Problem

Conventional display panels require a large number of signal lines to drive three sub-pixels, leading to increased costs for driver chips and reduced aperture ratios.

Innovation Solution

A pixel array and pixel unit design that uses only two gate lines and one data line to drive three sub-pixels, reducing the number of signal lines and improving the aperture ratio.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If conventional display panels use separate gate lines and data lines for each sub-pixel, then each sub-pixel can be driven independently, but the number of signal lines increases leading to higher driver chip costs and reduced aperture ratio

Engineering Contradiction:
Improvesub-pixel driving capabilityVSAvoidnumber of signal lines
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

The patent merges the gate line connections for three sub-pixels into shared gate lines. Specifically, first gate lines connect to first and third sub-pixels, second gate lines connect to second and third sub-pixels, and a single data line serves all three sub-pixels through their respective switching devices. This consolidation reduces the total number of signal lines from what would traditionally be required to at least four, thereby reducing driver chip complexity and cost while maintaining independent sub-pixel control capability

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent implements multi-functionality by designing the third sub-pixel's switching device to be controllable by both first and second gate lines, allowing it to function as part of different pixel units depending on which gate line is activated. The single data line also serves universal function by providing data signals to all three sub-pixels through their respective switching devices, replacing what would traditionally require three separate data lines

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Area of stationary object

If the number of signal lines is reduced to lower driver chip cost, then aperture ratio can be improved, but the ability to drive multiple sub-pixels independently may be compromised

Engineering Contradiction:
Improveaperture ratioVSAvoidsub-pixel driving flexibility
Core Design Contradiction:
Area of stationary objectVSAdaptability or versatility

Solution Approach 1:

The patent segments the pixel array into multiple pixel units, where each pixel unit contains three sub-pixels with specific connection patterns. This segmentation allows the system to maintain independent control of sub-pixels within each unit while using shared signal lines across units. The switching devices in each sub-pixel can be independently controlled through the segmented gate line structure, preserving driving flexibility despite reduced signal line count

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent resolves the contradiction by adding a temporal dimension to the control scheme. The third sub-pixel can be controlled by different gate lines at different time periods, allowing it to function as part of different pixel units sequentially. This time-based multiplexing enables the system to maintain adaptability and independent control capability while using fewer physical signal lines, effectively trading spatial resources for temporal control

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS8916879B2Pixel unit and pixel array
Publication Date: 2014.12.23 AU OPTRONICS CORP
  • US8916879B2 patent drawing
  • US8916879B2 patent drawing
  • US8916879B2 patent drawing

AI summary

A pixel array and a pixel unit thereof adapted in a display panel are provided. The pixel array includes a plurality of pixel units, and each pixel unit includes a first gate line, a second gate line, a data line, a first sub-pixel, a second sub-pixel and a third sub-pixel. The first sub-pixel is electrically connected to the second gate line and electrically connected to the data line through the third sub-pixel. The second sub-pixel is electrically connected to the second gate line and the data line. The third sub-pixel is electrically connected to the first gate line and the data line.