Pixel Voltage Regulator Stabilizing Reset Voltage for CMOS Image Sensors
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Solution Overview
Problem
Existing image sensor pixel designs face challenges in maintaining a well-defined reset voltage due to process, temperature, and supply variations, which affect the dynamic range and noise levels, particularly in 3T CMOS pixels.
Innovation Solution
A pixel circuit with a voltage regulating circuit that includes a replica transistor and current source, where the replica transistor is dimensioned similarly to the output transistor, allowing for the application of a target voltage that compensates for variations, ensuring a stable reset voltage and improved dynamic range.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If the source follower transistor dimensions are reduced to maintain high pixel fill factor, then the pixel area efficiency is improved, but the reset voltage becomes poorly defined and prone to process, temperature and supply variations
Solution Approach 1:
The patent employs a replica transistor that copies the characteristics of the source follower transistor. The replica transistor is designed with the same dimensions and operates under the same bias conditions, allowing it to replicate the threshold voltage variations. This copy is then used in a feedback mechanism to compensate for the variations in the actual source follower transistor, thereby stabilizing the reset voltage while maintaining small transistor dimensions for high fill factor.
Solution Approach 2:
The patent implements a feedback mechanism where the replica transistor's characteristics are used to adjust and stabilize the reset voltage. The voltage regulator circuit continuously monitors and adjusts the reset voltage based on the replica transistor's behavior, compensating for process, temperature and supply variations. This feedback loop ensures that the reset voltage remains stable despite the small dimensions of the source follower transistor.
2Measurement precision
If pseudo correlated double sampling is used to amplify and shift the pixel output signal, then the signal amplification is improved, but noise is added and layout space is consumed
Solution Approach 1:
The patent combines the voltage regulation function with the signal readout path by integrating the replica transistor and voltage regulator directly into the pixel circuit. This merging eliminates the need for separate pseudo CDS amplification stages, as the voltage regulation inherently provides the necessary signal level stabilization. The integration reduces the overall layout space required while maintaining signal amplification through the source follower transistor itself.
3Productivity
If the reset voltage is lowered to match the lowest signal level of the read-out chain, then the dynamic range is improved, but the reset voltage becomes more sensitive to variations
Solution Approach 1:
The patent uses a feedback mechanism where the replica transistor's characteristics are continuously monitored and used to adjust the reset voltage. This feedback loop ensures that the reset voltage is dynamically adjusted to compensate for process, temperature and supply variations, maintaining a well-defined reset level that optimizes dynamic range without excessive sensitivity to variations.
Solution Approach 2:
The patent dynamically adjusts the reset voltage parameter based on operating conditions. By changing the reset voltage level according to the replica transistor's characteristics and environmental conditions, the system maintains optimal dynamic range while compensating for variations. This parameter adjustment is achieved through the voltage regulator circuit that modifies the reset voltage based on feedback from the replica transistor.
Data Source
Figure 1~2
AI summary
A pixel circuit (100) wherein a pixel arrangement (20) comprises a pixel (30) comprising a photodetector (32), an integrator (38) for accumulating a signal from the photodetector (32), a source following output transistor (37) for amplifying the integrated signal, and a current source (34) for applying a readout current through the output transistor, a voltage regulating circuit (10) comprising an amplifier (11), a replica transistor (12) dimensioned substantially the same as the output transistor (37), and a replica current source (13) for providing substantially the readout current through each replica transistor (12), a gate of the replica transistor (12) is connected with an output node of the amplifier (11) connected with the pixel arrangement, and a source of the replica transistor (12) is connected with a negative input of the amplifier (11), and with the replica current source (13), a predefined reference voltage is applicable to a positive input.