Pixel Output Wiring Layout for Low-Crosstalk Photoelectric Conversion
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Solution Overview
Problem
Existing photoelectric conversion apparatuses with multiple pixel output lines in different wiring layers face significant electrical crosstalk issues, which are not effectively addressed by existing techniques, impacting image loading speed and pixel array pitch.
Innovation Solution
A photoelectric conversion apparatus with a multilayer wiring structure comprising a first and second inter-layer insulating layer, where the thickness and dielectric constant of the first inter-layer insulating layer are optimized to reduce parasitic capacitance between output lines, thereby minimizing crosstalk and enhancing loading speed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multiple pixel output lines are disposed in different wiring layers, then the image loading speed is improved and the array pitch can be suppressed, but electrical crosstalk between output lines increases
Solution Approach 1:
The patent applies local quality by making the first inter-layer insulating layer have a different thickness than the second inter-layer insulating layer. Specifically, the first inter-layer insulating layer has a smaller thickness to reduce parasitic capacitance between adjacent output lines in different wiring layers, while the second inter-layer insulating layer has a larger thickness to provide sufficient insulation. This localized variation in insulating layer thickness allows the patent to suppress electrical crosstalk in critical areas while maintaining overall wiring functionality.
Solution Approach 2:
The patent changes the physical parameter of the inter-layer insulating layer thickness to suppress electrical crosstalk. By reducing the thickness of the first inter-layer insulating layer compared to the second inter-layer insulating layer, the patent optimizes the balance between insulation performance and crosstalk suppression. This parameter change allows multiple output lines to be disposed in different wiring layers without excessive electrical interference.
2Reliability
If the thickness of inter-layer insulating layers is reduced to suppress crosstalk, then electrical insulation is improved, but manufacturing precision requirements increase
Solution Approach 1:
Instead of uniformly reducing all inter-layer insulating layer thicknesses, the patent applies local quality by selectively reducing only the first inter-layer insulating layer thickness where crosstalk occurs between output lines. The second inter-layer insulating layer maintains a larger thickness for general insulation. This localized approach reduces crosstalk while avoiding the need to precisely control all inter-layer insulating layers to thin dimensions, thereby reducing manufacturing precision requirements.
3Area of stationary object
If adjacent pixel output lines are disposed in different wiring layers, then the array pitch is suppressed, but device complexity increases
Solution Approach 1:
The patent utilizes the vertical dimension by disposing adjacent pixel output lines in different wiring layers (first wiring layer and second wiring layer). This three-dimensional wiring arrangement allows multiple output lines to be packed more densely without increasing the horizontal array pitch. The differentiated inter-layer insulating layer thicknesses further optimize this multi-layer structure by reducing parasitic capacitance between layers, making the complex wiring structure more efficient.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The optimized multilayer wiring structure effectively suppresses electrical crosstalk between pixel output lines, improving image loading speed and maintaining resistance, thus enabling higher pixel density and faster signal processing.
Implementation Method 1
A thickness of the first inter-layer insulating layer is smaller than a thickness of the second inter-layer insulating layer... suppresses electrical crosstalk occurring between pixel output lines
Data Source
AI summary
A photoelectric conversion apparatus includes a semiconductor layer in which pixels are arranged in a matrix, the pixels each including a photoelectric conversion portion and a transistor used for loading a signal from the photoelectric conversion portion, and multilayer wiring formed on the semiconductor layer and including a first wiring layer, a first inter-layer insulating layer, a second wiring layer, a second inter-layer insulating layer, and a third wiring layer in this order. The multilayer wiring includes a plurality of output lines for loading signals from the pixels. The output lines each include first wiring provided in the first wiring layer, second wiring provided in the second wiring layer, and a connecting portion penetrating the first inter-layer insulating layer to interconnect the first wiring and the second wiring. A thickness of the first inter-layer insulating layer is smaller than a thickness of the second inter-layer insulating layer.