Pixel-wise Gain-Adjusted Digital Conversion for CMOS Image Sensors
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Solution Overview
Problem
Conventional CMOS image sensors face challenges in achieving high resolution and low noise while maintaining power efficiency and dynamic range, particularly in portable devices, due to limitations in programmable gain amplifiers that result in linearity errors and vertical fixed-pattern noise.
Innovation Solution
Implementing pixel-wise, programmable gain digital conversion using column-parallel analog-to-digital converters with programmable gain amplifiers (PGAs) that support multiple gain settings, allowing for reset phase conversions to obtain baseline offsets and adjust gains based on pre-decision values, thereby reducing readout noise and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If conventional programmable gain amplifiers are used in CMOS image sensors, then gain adjustment is achieved, but linearity errors and vertical fixed-pattern noise occur
Solution Approach 1:
The patent divides the gain adjustment process into pixel-wise operations, where each pixel's signal is independently processed through column-parallel ADCs with pixel-specific gain selection. This segmentation allows precise control of gain for each pixel based on its signal characteristics, eliminating the linearity errors and vertical fixed-pattern noise that occur in conventional bulk gain adjustment methods.
Solution Approach 2:
The patent implements dynamic gain adjustment by first determining a pre-decision value for each pixel signal, then selecting the appropriate gain setting based on this pre-decision value. This dynamic, signal-dependent gain selection optimizes the conversion process for each pixel's specific signal level, resolving the linearity issues present in static gain adjustment approaches.
2Measurement precision
If high-performance analog-to-digital converters are implemented to achieve higher resolution and lower noise, then image quality improves, but power consumption increases
Solution Approach 1:
The patent applies partial gain adjustment by using pixel-wise gain selection through column-parallel ADCs, where only the necessary gain levels are applied based on each pixel's signal characteristics. This partial action approach achieves high resolution and low noise performance only where needed, rather than uniformly across all pixels, thereby reducing overall power consumption compared to full high-performance ADC implementation.
Solution Approach 2:
The patent changes the operational parameters of the ADC system by implementing pixel-wise gain adjustment with multiple gain settings. This parameter change allows the system to optimize resolution and noise performance for each pixel's signal level while consuming less power than a uniform high-performance ADC configuration would require.
3Measurement precision
If analog power is increased to improve dynamic range and reduce noise, then image sensor performance improves, but power consumption increases
Solution Approach 1:
The patent implements dynamic gain adjustment where the analog power and gain settings are adapted based on each pixel's signal characteristics. By determining pre-decision values and selecting appropriate gain settings dynamically, the system achieves high dynamic range and low noise performance only when necessary, reducing overall analog power consumption compared to maintaining high analog power levels uniformly.
Solution Approach 2:
The patent changes the analog operational parameters by implementing pixel-wise gain adjustment with multiple gain settings controlled by pre-decision values. This parameter change allows the system to achieve high dynamic range and noise performance through intelligent gain selection rather than uniformly increasing analog power, thereby reducing analog power consumption.
Data Source
AI summary
Techniques are described for digital conversion of pixel signals in a CMOS image sensor (CIS). The CIS includes column-parallel analog-to-digital converters (ADCs), each having a programmable gain amplifier (PGA) supporting N gain settings. Each ADC can execute, for each gain setting (Gn) of the N gain settings, a respective reset phase conversion to obtain a respective baseline offset (BOn) associated with the Gn. A pre-decision value can be determined as a function of a pixel signal, the pre-decision value corresponding to a selected one of the gain settings (Gs). The pixel signal can be converted by using the pre-decision value to set a gain of the PGA to the Gs and obtaining a signal offset (SO). A digital pixel output can be computed for the pixel signal as a function of the SO and the BOs, wherein the BOs is the BOn corresponding to the Gs.