Planar Switching Circuit Base Potential Control for EMI Shielding
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Solution Overview
Problem
Planar devices, particularly those using GaN chips, experience electromagnetic interference due to high-frequency potential jumps causing current flow through parasitic capacitors between the chip and the heat sink.
Innovation Solution
The planar device is designed with a base connected to a target potential point that maintains a low-frequency change, limiting high-frequency current flow between the chip and the base, thereby reducing electromagnetic interference.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If the chip is in contact with the heat sink through an insulating medium, then heat dissipation is achieved, but parasitic capacitance is formed between the chip and heat sink causing electromagnetic interference
Solution Approach 1:
The patent introduces a substrate as an intermediary component between the chip and heat sink. The substrate is electrically connected to the base which is connected to a target potential point, thereby mediating the electrical interaction and preventing direct parasitic capacitance formation between chip and heat sink while maintaining thermal contact
2Speed
If the chip operates at high frequency, then switching performance is improved, but high-frequency potential jumps generate current through parasitic capacitance causing electromagnetic interference
Solution Approach 1:
The patent connects the base to a target potential point that maintains low-frequency changing state, creating an equipotential reference that prevents high-frequency potential differences between chip and heat sink, thereby eliminating the driving force for high-frequency interference currents
3Device complexity
If conventional planar device structure is used, then device integration is achieved, but electromagnetic interference from high-frequency switching cannot be effectively shielded
Solution Approach 1:
The patent extends the conventional planar structure by introducing a vertical electrical connection dimension through the substrate and base structure connected to target potential points, creating a three-dimensional potential control architecture that effectively shields high-frequency interference while maintaining planar integration
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design effectively shields high-frequency potential jumps, minimizing electromagnetic interference and improving circuit integration by reducing high-frequency current flow through parasitic capacitors.
Implementation Method 1
There is a parasitic capacitor between the chip and the heat sink, and thus the high-frequency jumping potential of the chip generates a current flowing between the chip and the heat sink through the parasitic capacitor
Data Source
AI summary
A planar device and a switching circuit are provided. The planar device includes at least one chip and a base; where the chip includes a substrate; the substrate is arranged on a side of the chip close to the base, and the substrate is electrically connected to the base; a side of the chip away from the base is provided with at least one source and at least one gate; the at least one source and the at least one gate are electrically connected to the chip; and the base is connected to a target potential point, and the target potential point is for maintaining a potential of the base in a low-frequency changing state or a constant state.