Planar Electronic Device High Permittivity Cover Layer Capacitance
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Solution Overview
Problem
Planar electronic devices with magnetic components, such as transformers and inductors, face performance degradation due to inadequate capacitive coupling between conductive windings, leading to poor signal transmission and return loss, especially at high frequencies, compared to their wired counterparts.
Innovation Solution
The implementation of a planar electronic device with a substrate having conductive vias and cover layers of high permittivity materials, including metalized cover layers with petals, to increase capacitance between primary and secondary conductive loops, enhancing capacitive coupling and signal transmission.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If conductors are closely spaced to maximize capacitive coupling, then capacitance between windings increases, but signal degradation and return loss worsen due to adjacent primary and secondary sections being different
Solution Approach 1:
The patent applies local quality by adding high permittivity material specifically in regions where capacitive coupling is needed (between primary and secondary windings), while maintaining different lengths for primary and secondary conductors to achieve their respective functions. This localized enhancement of dielectric properties increases capacitance without compromising the different functional requirements of primary and secondary sections.
Solution Approach 2:
The patent changes the dielectric parameter (permittivity) by introducing high permittivity material between the windings. This parameter change directly increases the capacitance between primary and secondary conductors, addressing the need for maximum capacitive coupling in planar electronic devices.
2Ease of manufacture
If planar electronic devices use traditional conductor layout, then manufacturing is simpler, but performance at high frequencies deteriorates due to less primary and secondary capacitance
Solution Approach 1:
The patent changes the dielectric parameter by introducing high permittivity material in the cover layer, which significantly increases the capacitance between windings. This parameter change enables planar devices to achieve performance comparable to wired counterparts at high frequencies while maintaining the simplicity of planar manufacturing processes.
Solution Approach 2:
The patent uses composite material structure by combining traditional conductor traces with high permittivity dielectric material in the cover layer. This composite approach leverages the advantages of both simple planar fabrication and enhanced electromagnetic performance, achieving high frequency reliability without complicating the manufacturing process.
3Reliability
If conductive windings are not conductively coupled, then magnetic field coupling is achieved, but capacitive coupling and signal transmission performance are insufficient
Solution Approach 1:
The patent changes the dielectric parameter by introducing high permittivity material between the magnetically coupled windings. This enables the system to achieve both magnetic field coupling (through the ferrite core) and enhanced capacitive coupling (through the high permittivity cover layer), combining both coupling mechanisms for improved high frequency performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration improves the performance of planar electronic devices by increasing capacitance and reducing return loss, thereby enhancing their efficiency, especially at high frequencies, and potentially matching the performance of wired devices.
Implementation Method 1
An upper cover layer covers the upper side and has a high permittivity. The upper cover layer is positioned relative to the top conductors to increase capacitance between the primary and secondary loops.
Implementation Method 2
The upper cover layer is positioned relative to the top conductors to increase capacitance between the primary and secondary loops.
Implementation Method 3
The current flowing through one winding generates a magnetic field in the core and in the other winding. The magnetic field in the other winding generates an electric current in the other winding.
Implementation Method 4
a ferrite core with conductive winding extending around the ferrite core
Data Source
AI summary
A planar electronic device includes a planar substrate having a cavity configured to receive a ferrite material body therein. The planar substrate has an upper side and a lower side and conductive vias extending through the substrate. Top conductors are provided on the upper side of the planar substrate and are electrically connected to corresponding conductive vias. Bottom conductors are provided on the lower side of the planar substrate and are electrically connected to corresponding conductive vias. The bottom conductors, top conductors and conductive vias define a primary conductive loop and a secondary conductive loop. An upper cover layer covers the upper side and has a high permittivity. The upper cover layer is positioned relative to the top conductors to increase capacitance between the primary and secondary loops.