Planar FET Cell with MOS-Gated Diode for Reverse Power Loss Reduction

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Solution Overview

Problem

Semiconductor devices with field effect transistors face significant power losses during reverse operation due to the forward operation of the body diode, which affects the efficiency of circuit applications like DC-DC converters.

Innovation Solution

A semiconductor device comprising a first planar field effect transistor cell acting as a MOS gated diode (MGD) connected in parallel with a second field effect transistor cell, where the first cell has a drain extension region for voltage blocking and a thinner gate dielectric to reduce threshold voltage, allowing current flow before the body-drain diode's forward voltage is reached, thereby minimizing power losses.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If field effect transistor cells are used in circuit applications such as DC-DC converters, then the desired current-carrying capacity is achieved, but power losses increase during reverse operation due to body diode forward operation

Engineering Contradiction:
Improvecurrent-carrying capacityVSAvoidpower loss during reverse operation
Core Design Contradiction:
PowerVSLoss of energy

Solution Approach 1:

The transistor cell is segmented into two distinct cells: a first field effect transistor cell configured as a MOS-gated diode (MGD) and a second field effect transistor cell configured as a load transistor. This segmentation allows each cell to be optimized for its specific function, with the MGD handling reverse operation current to reduce power losses while the load transistor handles forward operation current.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The MGD cell is given local quality differences through a thinner gate dielectric layer compared to the load transistor, creating a lower threshold voltage specifically in the MGD cell. This local modification enables the MGD to activate earlier during reverse operation, reducing power losses without affecting the load transistor's performance.

Inventive Principle:
Principle #3Local quality

2Loss of energy

If a thinner gate dielectric is used in the first field effect transistor cell to reduce threshold voltage, then power loss during reverse operation is reduced, but manufacturing precision requirements increase

Engineering Contradiction:
Improvepower loss during reverse operationVSAvoidgate dielectric thickness control
Core Design Contradiction:
Loss of energyVSManufacturing precision

Solution Approach 1:

The gate dielectric layer is made locally different between the two transistor cells, with the MGD cell having a thinner gate dielectric than the load transistor. This local quality differentiation is achieved through selective processing steps that modify the gate dielectric thickness or properties only in the MGD region, thereby reducing the overall manufacturing precision burden while still achieving the desired threshold voltage reduction.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The threshold voltage of the MGD is adjusted by changing the gate dielectric thickness parameter. By making the gate dielectric thinner in the MGD cell compared to the load transistor, the threshold voltage is reduced, allowing the MGD to conduct current at lower voltages during reverse operation, thus reducing power losses.

Inventive Principle:
Principle #35Parameter changes

3Power

If multiple field effect transistor cells are connected in parallel to increase current-carrying capacity, then the desired power handling is achieved, but device complexity increases

Engineering Contradiction:
Improvecurrent-carrying capacityVSAvoidtransistor cell configuration
Core Design Contradiction:
PowerVSDevice complexity

Solution Approach 1:

The parallel connection of transistor cells is segmented into functionally distinct roles: one MGD cell for reverse operation and one load transistor for forward operation. This functional segmentation simplifies the control architecture compared to using identical cells, as the MGD's body diode provides inherent reverse conduction path without requiring external control signals.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The MGD cell serves multiple functions: it acts as a diode for reverse operation current conduction, provides a low-loss path during reverse bias, and still functions as a transistor when needed. This multi-functionality reduces the need for separate dedicated components, thereby managing device complexity while maintaining high current-carrying capacity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively reduces power losses during reverse operation by enabling current flow through the MGD before the body-drain diode's forward voltage is reached, enhancing the efficiency of circuit arrangements, particularly in DC-DC converters.

Implementation Method 1

a first thickness of a first gate dielectric arranged on the channel region of the first planar field effect transistor cell is less than a second thickness of a second gate dielectric arranged on the channel region of the second planar field effect transistor cell

Methodology Applied
Scientific EffectElectric Field: Electric Field

Data Source

PatentUS10985245B2Semiconductor device with planar field effect transistor cell
Publication Date: 2021.04.20 INFINEON TECHNOLOGIES AG
  • US10985245B2 patent drawing
  • US10985245B2 patent drawing
  • US10985245B2 patent drawing

AI summary

The disclosure relates to a semiconductor device including a first planar field effect transistor cell and a second planar field effect transistor cell. The first planar field effect transistor cell and the second planar field effect transistor cell are electrically connected in parallel and each include a drain extension region between a channel region and a drain terminal at a first surface of a semiconductor body. A gate electrode of the first field effect transistor cell is electrically connected to a source terminal, and a gate electrode of the second field effect transistor cell is connected to a gate terminal that is electrically isolated from the source terminal.