Planar Gate STI Structure for Divot-Free Channel Stability
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Solution Overview
Problem
Current semiconductor devices face challenges in maintaining stable static characteristics and preventing the formation of divots in shallow trench isolation structures, which can lead to reduced withstand voltage and instability in transistor performance.
Innovation Solution
The semiconductor device incorporates a trench insulating structure with a divot formation prevention mechanism, where butting regions with higher impurity concentration are formed to ensure stable channel formation and suppress the hump phenomenon in drain current-gate voltage characteristics by covering the trench insulating structure and body region with a planar gate structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a shallow trench isolation structure is formed in conventional semiconductor devices, then isolation between transistors is achieved, but divots form in the isolation structure leading to reduced withstand voltage and unstable transistor performance
Solution Approach 1:
The patent applies preliminary action by forming a protective oxide layer on the trench isolation structure before subsequent processing steps. This oxide layer is formed in advance to prevent divot formation during later etching or processing operations, thereby maintaining the integrity of the trench isolation structure and ensuring stable transistor performance without requiring complex additional structures
2Reliability
If the trench insulating structure is made deeper to prevent divot formation, then isolation effectiveness improves, but manufacturing complexity and cost increase
Solution Approach 1:
The patent applies parameter changes by modifying the physical and chemical properties of the trench isolation structure through oxide layer formation and controlled impurity concentration adjustments. Instead of increasing trench depth, the solution changes the material parameters (oxide coverage, impurity concentration gradients) to achieve effective isolation while maintaining simpler manufacturing processes and avoiding the need for deeper, more complex trench structures
Data Source
AI summary
A semiconductor device includes a chip having a principal surface, a trench insulating structure formed in the principal surface of the chip, a first conductivity type body region formed in a surface layer portion of the principal surface such that the body region is in contact with the trench insulating structure, a second conductivity type source region formed in a surface layer portion of the body region while being separated from the trench insulating structure, a first conductivity type butting region formed in a region between the trench insulating structure and the source region in the surface layer portion of the body region, and a planar gate structure that passes through a side of the butting region, covers the body region and the trench insulating structure, and is capable of controlling reversal and non-reversal of a channel in the body region.