Planar Gate Semiconductor Structure for Low Gate-Drain Capacitance
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional semiconductor devices with trench gate electrodes face complexities in structure and high capacitance between the gate and drain electrodes, limiting high-speed switching capabilities.
Innovation Solution
The semiconductor device incorporates a planar gate electrode with a columnar FP electrode configuration, reducing capacitance through the use of FP insulating films and a simplified structure that eliminates the need for conductive members connecting the gate electrode to the gate wiring member, allowing for increased surface area of the p-type semiconductor layer and n+-type source layer around the FP insulating film.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a trench gate electrode structure is used, then the device can achieve certain electrical characteristics, but the structure becomes complex and capacitance between gate and drain electrodes increases
Solution Approach 1:
The patent extracts the gate electrode from the trench structure and places it on the surface as a planar electrode. This eliminates the complex trench configuration while maintaining electrical functionality through the FP electrode arrangement, thereby reducing structural complexity without sacrificing electrical characteristics.
Solution Approach 2:
The patent transitions from a vertical trench gate structure to a horizontal planar gate structure. By changing the dimensional orientation of the gate electrode from vertical (in trench) to horizontal (on surface), the device achieves simplified structure while controlling capacitance through the FP electrode configuration.
2Reliability
If a trench gate electrode structure is used, then the device can achieve certain electrical characteristics, but capacitance between gate and drain electrodes increases limiting high-speed switching
Solution Approach 1:
By extracting the gate electrode from the trench and positioning it on the surface, the patent reduces the overlap area between gate and drain electrodes. This extraction eliminates the capacitance issue inherent in trench structures, enabling high-speed switching while preserving electrical characteristics through the FP electrode mechanism.
Solution Approach 2:
The FP electrode acts as an intermediary element that maintains electrical characteristics without increasing capacitance. It mediates between the planar gate electrode and the drain region, providing necessary electrical control while the insulating film between FP electrode and drain prevents direct capacitive coupling, thus enabling high-speed switching.
3Reliability
If conductive members are added to connect gate electrode to gate wiring member, then electrical connectivity is achieved, but device structure becomes more complex
Solution Approach 1:
The patent merges the gate electrode directly with the gate wiring member on the surface, eliminating the need for separate conductive members to connect them. This integration maintains electrical connectivity while reducing structural complexity by removing unnecessary intermediate components.
Solution Approach 2:
The planar gate electrode structure serves multiple functions: it provides electrical control, acts as a wiring element itself, and eliminates the need for separate connection members. This multi-functionality reduces overall device complexity while maintaining necessary electrical connectivity.
Data Source
AI summary
A semiconductor device includes: a first electrode; a first semiconductor layer; a first insulating film extending downward from an upper surface of the first semiconductor layer, the first insulating film being columnar; a second electrode located in the first insulating film, the second electrode extending in a vertical direction, the second electrode being columnar; a second semiconductor layer partially provided in an upper layer portion of the first semiconductor layer, the second semiconductor layer being next to the first insulating film with the first semiconductor layer interposed; a third semiconductor layer partially provided in an upper layer portion of the second semiconductor layer; and a third electrode located higher than the upper surface of the first semiconductor layer, the third electrode overlapping a portion of the first insulating film, a portion of the first semiconductor layer, and a portion of the second semiconductor layer when viewed from above.