Planar Heater Fabrication via CMP Planarization

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Solution Overview

Problem

Existing CMOS backend processes for fabricating planar heater structures in ejection devices are inefficient in utilizing the advantages of chemical mechanical polishing (CMP) techniques, leading to surface topology issues and defects such as smearing and dishing, especially when working with materials like aluminum and Methylsilsesquioxane (MSQ).

Innovation Solution

The method involves providing a substrate wafer with metallic plugs, depositing and patterning a second metallic material, applying a dielectric layer, and conducting chemical mechanical polishing to form a planarized surface, followed by cleaning and patterning a resistor film, and depositing blanket films, which allows for efficient planarization and improved surface topology.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If CMP technique is used to planarize MSQ material, then surface topology is improved, but the polishing process becomes slow and defect-prone

Engineering Contradiction:

Improvesurface topologyVSAvoidpolishing speed

Core Design Contradiction:

Manufacturing precisionVSProductivity

Solution Approach 1:

The patent changes the material parameter from MSQ to spin-on-glass (SOG) material, which has different polishing characteristics. SOG material can be polished faster and with fewer defects while still achieving the required planar surface topology for the heater structure

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The patent uses a sacrificial layer approach where a temporary dielectric layer is deposited and removed after serving its planarization purpose. This allows the use of aggressive polishing parameters on the sacrificial layer without damaging the final MSQ heater material

Inventive Principle:

Principle #27Cheap short-living objects (Disposable)

2Ease of manufacture

If CMP technique is used to pattern aluminum, then simplicity of patterning is achieved, but smearing and dishing defects occur

Engineering Contradiction:

Improvepatterning simplicityVSAvoidsurface quality

Core Design Contradiction:

Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent introduces an intermediary protective layer between the aluminum and the CMP polishing interface. This protective layer prevents direct contact between the polishing slurry and aluminum, eliminating smearing and dishing defects while allowing the aluminum to be patterned underneath

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent performs preliminary planarization of the substrate before depositing the aluminum layer. This preliminary action creates a flat base that reduces the amount of subsequent polishing needed, minimizing the risk of aluminum defects while maintaining patterning simplicity

Inventive Principle:

Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the surface topology of heater structures, reduces process steps, and improves the reliability and performance of ejection devices by achieving a flat and defect-free planarized surface, thereby overcoming topography-related issues and streamlining fabrication processes.

Implementation Method 1

conducting chemical mechanical polishing of the layer of the dielectric material to form a planarized top surface

Methodology Applied

Scientific EffectChemical mechanical polishing:

Data Source

PatentUS8833908B2Planar heater structures for ejection devices

Publication Date: 2014.09.16 LEXMARK INTERNATIONAL INC

AI summary

Disclosed is a method for fabricating a planar heater structure for an ejection device. The method includes providing a substrate wafer having a plurality of plugs configured therewithin. The method also includes depositing and patterning a layer of a second metallic material over the substrate wafer, providing a layer of a dielectric material of a predetermined thickness over the patterned layer of the second metallic material, and conducting chemical mechanical polishing of the layer of the dielectric material to form a planarized top surface while exposing the patterned layer of the second metallic material. The method further includes cleaning the planarized top surface, depositing and patterning a resistor film over the planarized top surface, depositing one or more blanket films over the patterned resistor film, and patterning and etching the one or more blanket films. Further disclosed are planar heater structures and additional methods for fabricating the planar heater structures.