Planar IC Antenna Structures for 55-64 GHz Wireless Communication
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Solution Overview
Problem
Current integrated circuits face challenges in implementing effective antenna structures for wireless communication due to size constraints, as traditional three-dimensional antennas cannot be accommodated in the two-dimensional space of ICs or PCBs, limiting efficient signal transmission and reception.
Innovation Solution
The development of integrated circuit antenna structures that utilize on-die or on-package substrate RF transceivers with antenna structures, including ultra-narrow and narrow bandwidth configurations, to support local and remote wireless communications within the 55 GHz to 64 GHz frequency band, enabling efficient RF signal transmission and reception without the need for conductive traces.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional three-dimensional antennas are used for wireless communication, then signal transmission and reception efficiency is improved, but the antenna cannot be accommodated in the two-dimensional space of integrated circuits or PCBs
Solution Approach 1:
The patent transitions from traditional three-dimensional antennas to two-dimensional planar antenna structures that can be integrated onto IC substrates or PCBs. The antenna elements are configured as flat, planar geometries (such as microstrip patches or printed circuit board traces) that maintain electromagnetic radiation capabilities while conforming to the two-dimensional constraints of integrated circuit packaging and PCB mounting surfaces.
2Area of stationary object
If on-die or on-package substrate antenna structures are used, then integration density is improved, but bandwidth is reduced to ultra-narrow or narrow configurations
Solution Approach 1:
The patent employs parameter optimization techniques to maximize the performance of narrowband antenna structures. This includes adjusting the resonant frequency, quality factor (Q), and impedance matching parameters of the planar antenna elements to achieve optimal operation within the constrained bandwidth. The antenna designs are tuned to specific frequency ranges (such as 2.4 GHz ISM band or 5 GHz WLAN bands) where the narrowband characteristics are acceptable for the application.
3Device complexity
If conductive traces are eliminated from the circuit design, then manufacturing complexity is reduced, but RF signal transmission paths must be reconfigured
Solution Approach 1:
The patent merges the antenna structure directly with the RF transceiver circuitry on the same substrate or package. The planar antenna elements are fabricated using the same semiconductor or PCB fabrication processes as the surrounding circuitry, eliminating the need for separate conductive trace routing. This integration approach combines the signal transmission function with the antenna radiation function in a unified structure that can be manufactured as a single component.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution allows for efficient wireless communication between ICs and other components within a device, supporting both local and remote communications with improved data rates and reduced complexity in circuit design, while accommodating the miniaturization of electronic devices.
Implementation Method 1
antenna structures, including ultra-narrow and narrow bandwidth configurations, to support local and remote wireless communications within the 55 GHz to 64 GHz frequency band
Data Source
AI summary
An integrated circuit includes a substrate and a first integrated circuit die having a first circuit coupled to the substrate via a first bonding wire, the first circuit having a first intra-chip interface. A second integrated circuit die has a second circuit coupled to the substrate via a second bonding wire, the second circuit having a second intra-chip interface, the second bonding wire electrically isolated from the first bonding wire. The first circuit communicates with the second circuit via the first intra-chip interface and the second intra-chip interface, and wherein the first intra-chip interface and the second intra-chip interface communicate via a first electromagnetic coupling between the first bonding wire and the second bonding wire.


