Planar Inductor AC Loss Reduction via Trace Ratio
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Planar inductors face challenges in reducing alternating current (AC) resistive losses due to manufacturing limitations and volume restrictions, which increase proximity effect resistance and manufacturing costs, unlike wire wound inductors.
Innovation Solution
The planar inductor is designed with thinner traces and fewer layers, positioned and sized according to specific ratios to minimize AC resistive losses, including a width-to-distance ratio of 1.3 for the traces and a distance between coils, which reduces total AC resistance and inductance rating while maintaining a reduced circuit footprint.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If planar inductors use conventional trace designs to maintain inductance rating, then manufacturing is simpler, but AC resistive losses increase due to proximity effect resistance
Solution Approach 1:
The patent applies parameter changes by optimizing the width-to-distance ratio of traces to a specific value of 1.3, and adjusting the number of layers and turns. These parameter modifications reduce proximity effect resistance and AC resistive losses while maintaining the required inductance rating, directly resolving the contradiction between energy loss reduction and design complexity.
2Loss of energy
If planar inductors reduce trace width to decrease AC resistance, then AC resistive losses decrease, but manufacturing precision requirements increase
Solution Approach 1:
The patent determines an optimal trace width through parameter optimization that achieves the target width-to-distance ratio of 1.3. This optimized parameter reduces AC resistive losses while establishing clear manufacturing specifications that balance precision requirements with manufacturability, resolving the contradiction between energy loss reduction and manufacturing precision.
3Reliability
If planar inductors increase the number of layers to maintain inductance rating, then inductance rating is maintained, but AC resistive losses increase due to proximity effect
Solution Approach 1:
The patent optimizes the number of layers and turns as interconnected parameters to achieve the target width-to-distance ratio of 1.3. This multi-parameter optimization reduces proximity effect resistance and AC resistive losses while maintaining the required inductance rating, resolving the contradiction between reliability and energy loss.
Solution Approach 2:
The patent redistributes inductance across multiple layers strategically, using the vertical dimension to manage magnetic coupling and reduce proximity effects. By optimizing the spatial arrangement in three dimensions rather than relying on a single layer, the design maintains inductance rating while reducing AC resistive losses.
4Loss of energy
If planar inductors use thicker traces to reduce AC resistance, then AC resistive losses decrease, but circuit footprint increases
Solution Approach 1:
The patent determines an optimized trace width parameter that achieves the target width-to-distance ratio of 1.3, balancing AC resistance reduction with footprint constraints. This optimized parameter allows thinner traces compared to conventional designs, reducing both AC resistive losses and circuit footprint simultaneously.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design effectively decreases AC resistive losses and increases the inductance rating of planar inductors, outperforming conventional designs by reducing proximity effect resistance and maintaining a lower manufacturing cost and circuit footprint.
Implementation Method 1
A planar inductor may include one or more coils and one or more layers of material that are manufactured as a printed circuit board (PCB). Each coil may include a different trace that forms a number of turns and controls an inductance rating of the planar inductor.
Implementation Method 2
The total AC resistance of the planar inductor may be based on a skin effect resistance and a proximity effect resistance.
Implementation Method 3
The proximity effect resistance may be based on an aggregate of mutual magnetic flux fields being generated by a corresponding trace and neighboring traces.
Data Source
AI summary
A planar inductor may include a first coil and a second coil. The first coil may include a first trace that forms a first set of turns. The second coil may include a second trace that forms a second set of turns. A distance between the turns of the first set of turns may be equal to a distance between the turns of the second set of turns. A width of the first trace may be equal to a width of the second trace. The first coil and the second coil may be physically positioned or sized according to a/b in which a represents the width of the first trace and b represents the distance between the turns of the first set of turns.