Planar Memory Cells With Sidewall And Bulk Regions

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Solution Overview

Problem

Memory cells with sidewall and bulk regions in planar structures face challenges in maintaining structural integrity and performance due to stress from programming operations and manufacturing processes, leading to reduced efficiency and increased leakage current.

Innovation Solution

Modifying the procedures for forming planar memory arrays to increase the width and resistivity of the sidewall region, while optimizing the dimensions of the bulk region, to enhance structural integrity and reduce leakage, thereby improving the overall performance of the memory cells without significantly increasing power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Strength

If the width of the sidewall region is increased to improve structural integrity, then the memory cell area increases, but the storage density decreases

Engineering Contradiction:
Improvestructural integrityVSAvoidmemory cell area
Core Design Contradiction:
StrengthVSArea of stationary object

Solution Approach 1:

The patent applies local quality by creating distinct regions within the memory cell structure - specifically, a sidewall region with modified material composition or properties adjacent to the bulk region. This allows the sidewall region to provide enhanced structural support and stress relief locally without requiring the entire memory cell to be enlarged, thus maintaining high storage density while improving structural integrity.

Inventive Principle:
Principle #3Local quality

2Object-generated harmful factors

If the width of the sidewall region is increased to reduce leakage current, then the memory cell area increases, but the storage density decreases

Engineering Contradiction:
Improveleakage currentVSAvoidmemory cell area
Core Design Contradiction:
Object-generated harmful factorsVSArea of stationary object

Solution Approach 1:

The patent introduces a sidewall region with specific local properties (such as modified material composition, doping concentration, or structural characteristics) that provide enhanced leakage control. This localized modification allows effective leakage current reduction without requiring proportional increases in memory cell area, thereby maintaining high storage density while suppressing harmful leakage effects.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The sidewall region acts as an intermediary structure between the bulk region and surrounding environment. By introducing this intermediate zone with tailored properties, the patent effectively mediates the leakage current flow, providing a transition region that reduces leakage without requiring the entire memory cell to be enlarged.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Productivity

If the dimensions of the bulk region are optimized to improve performance, then the structural stability decreases due to stress from programming operations

Engineering Contradiction:
Improvememory cell performanceVSAvoidstructural stability
Core Design Contradiction:
ProductivityVSStability of the object's composition

Solution Approach 1:

The patent creates a sidewall region with distinct local properties adjacent to the bulk region. This sidewall region is specifically designed to provide stress relief and structural support, allowing the bulk region to be optimized for high-performance operations without compromising overall structural stability. The localized functional differentiation enables simultaneous optimization of both performance and stability.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The sidewall region serves as a pre-established protective structure that cushions the bulk region against stress from programming operations. By having this protective sidewall region in place before stress occurs, the patent prevents structural damage to the bulk region, allowing aggressive optimization for performance without risking structural integrity during high-stress programming operations.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Data Source

PatentUS20240147872A1Memory cells with sidewall and bulk regions in planar structures
Publication Date: 2024.05.02 MICRON TECHNOLOGY INC
  • US20240147872A1 patent drawing
  • US20240147872A1 patent drawing
  • US20240147872A1 patent drawing

AI summary

Methods, systems, and devices for techniques for memory cells with sidewall and bulk regions in planar structures are described. A memory cell may include a first electrode, a second electrode, and a self-selecting storage element between the first electrode and the second electrode. A conductive path between the first electrode and the second electrode may extend in a direction away from a plane defined by a substrate. The self-selecting storage element may include a bulk region and a sidewall region. The bulk region may include a chalcogenide material having a first composition, and the sidewall region may include the chalcogenide material having a second composition that is different than the first composition. The bulk region and sidewall region may extend between the first electrode and the second electrode and in the direction away from the plane defined by the substrate.