Planar MTJ MRAM for Multi-Bit Storage via Area Variation
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Solution Overview
Problem
Conventional multi-bit spin-momentum-transfer magnetoresistive random access memory (MRAM) devices face challenges in achieving well-separated resistance levels and write thresholds due to the sensitivity of vertically stacked magnetic-tunnel-junction (MTJ) devices, resulting in a small process window, lower yield, and slower performance.
Innovation Solution
The implementation of a spin-momentum-transfer MRAM system with multiple magnetic-tunnel-junction devices fabricated from the same thin film stack and located on a common plane, each with different areas to achieve varying resistances and write thresholds, while maintaining identical material properties, enhancing yield and reducing cost.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If vertically stacked MTJ devices are used to achieve multi-bit storage, then memory density is improved, but manufacturing precision and yield deteriorate due to sensitivity of sidewall profile and process window
Solution Approach 1:
The patent transitions from vertical stacking (3D vertical arrangement) to lateral placement (2D planar arrangement) of multiple MTJ devices. By positioning MTJ devices side-by-side on the same substrate plane rather than stacking them vertically, the design eliminates sidewall profile sensitivity while maintaining multi-bit storage capability through differential area design.
Solution Approach 2:
The patent applies local quality by varying the area of individual MTJ devices within the same process batch. Each MTJ device is designed with a specific area tailored to its intended resistance level, allowing four distinct resistance states to be achieved through local area differentiation rather than requiring precise control of vertical stacking parameters.
2Measurement precision
If vertically stacked MTJ devices are used with carefully tuned properties, then four well-separated resistance levels are achieved, but device complexity increases due to multiple MTJ stacks
Solution Approach 1:
The patent achieves four well-separated resistance levels by changing the area parameter of individual MTJ devices rather than stacking multiple MTJ devices. Each MTJ device's resistance is controlled by its area, allowing systematic creation of four distinct resistance states (R1, R2, R3, R4) through area variation while using a single MTJ stack per bit-line pair.
3Quantity of substance
If vertically stacked MTJ devices are used, then multi-bit storage is achieved, but productivity decreases due to slower performance
Solution Approach 1:
By moving from vertical stacking to lateral arrangement, the patent enables parallel operation of multiple MTJ devices. The side-by-side configuration allows independent addressing and faster switching operations compared to series-connected vertical stacks, improving write speed while maintaining multi-bit storage capacity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for increased memory density with improved yield and reduced cost by local tracking of MTJ device sizes through mask design and photolithography, enabling efficient data storage and retrieval with enhanced performance.
Implementation Method 1
Spin-momentum-transfer (SMT) magnetoresistive random access memory (MRAM) is a non-volatile solid state memory device that uses the direction of magnetic moment in the free layer to store digital information, and use the SMT effect to change the magnetic moment direction and write digital data.
Implementation Method 2
An attribute of solid state memory technology is the size or area occupied by each bit of a given solid state device (e.g., a transistor), which is closely tied to cost per bit. A goal of solid state memory technology is to store more than one bit of information per memory cell, effectively multiplying the density with little additional cost.
Data Source
AI summary
A magneto resistive random access memory system includes a first magnetic-tunnel-junction device coupled to a first bit-line, a second magnetic-tunnel-junction device coupled to a second bit-line, a selection transistor coupled to the first and second bit-lines and a word-line coupled to the selection transistor.