Planar Multi-Implanted JFET Threshold Voltage Control
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Solution Overview
Problem
Junction field-effect transistors (JFETs) made from wide bandgap materials like silicon carbide face challenges in achieving precise control of threshold voltage due to process variations and complexity in deep trench etches, which affect reliability and performance, especially in high-power applications.
Innovation Solution
A method using multiple implantations with a single mask to form both horizontal and vertical channel elements in JFETs, allowing for self-aligned gate and channel structures, with additional implantations to vary doping levels and create vertical channel regions, thereby controlling the threshold voltage and improving device operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If deep trench etches are used to form vertical channels, then channel length can be controlled, but manufacturing precision deteriorates due to process variations
Solution Approach 1:
The patent replaces the mechanical deep trench etching process with an ion implantation process to form vertical channels. Instead of using complex etching machinery to create precise deep trenches, the invention uses ion implantation through a patterned mask to directly dope the vertical channel regions, substituting a simpler, more controllable process that achieves better precision without the variations inherent in deep etching.
Solution Approach 2:
The patent controls threshold voltage by precisely adjusting the doping concentration and dose during ion implantation. By changing the implantation parameters (energy, dose, angle) rather than relying on etch depth control, the invention achieves tight threshold voltage control. The doping concentration in the vertical channel is specifically tuned to affect threshold voltage while maintaining blocking capability.
2Productivity
If channel length is reduced to improve current handling, then productivity increases, but blocking capability deteriorates
Solution Approach 1:
The patent transitions from a purely horizontal channel structure to a three-dimensional structure with both horizontal and vertical channel components. The vertical channel extends downward from the horizontal channel into the drift region, creating a L-shaped current path. This dimensional change allows the effective channel length to be longer for blocking purposes while the horizontal projection remains short for high current density, resolving the contradiction between current handling and blocking capability.
Solution Approach 2:
The channel is segmented into distinct horizontal and vertical portions, each serving different functions. The horizontal channel portion handles high current density near the surface, while the vertical channel portion provides the blocking length in the drift region. This segmentation allows optimization of each portion independently - short horizontal length for current handling, sufficient vertical length for blocking.
3Reliability
If multiple implants are used to vary doping levels, then device performance improves, but device complexity increases
Solution Approach 1:
The patent combines multiple implantation steps into a single mask-aligned process. The patterned mask is used to define all channel regions (horizontal and vertical) and gate regions simultaneously, allowing multiple doping implants to be performed with precise spatial relationships established by the single mask pattern. This merging of alignment functions reduces the number of separate lithography and alignment steps, simplifying the overall process despite multiple implants.
Solution Approach 2:
The single patterned mask serves multiple functions: defining horizontal channel regions, defining vertical channel regions, defining gate regions, and establishing self-alignment for all implanted structures. This multi-functional mask design consolidates what would otherwise require multiple separate patterning operations, reducing process complexity while enabling varied doping levels in different regions through subsequent selective implantation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables tight control over threshold voltage and reduces variations, enhancing the reliability and performance of JFETs by allowing for shorter channel lengths without compromising blocking capability, leading to improved current handling and reduced on-resistance.
Implementation Method 1
A JFET having vertical and horizontal channel elements may be made from a semiconductor material such as silicon carbide (SiC) by a method using a single mask for multiple implantations to form a horizontal planar JFET region
Data Source
AI summary
A JFET having vertical and horizontal channel elements may be made from a semiconductor material such as silicon carbide using a first mask for multiple implantations to form a horizontal planar JFET region comprising a lower gate, a horizontal channel, and an upper gate, all above a drift region resting on a drain substrate region, such that the gates and horizontal channel are self-aligned with the same outer size and outer shape in plan view. A second mask may be used to create a vertical channel region abutting the horizontal channel region. The horizontal channel and vertical channel may each have multiple layers with varying doping concentrations. Angled implantations may use through the first mask to implant portions of the vertical channel regions. The window of the second mask may partially overlap the horizontal JFET region to insure abutment of the vertical and horizontal channel regions.