Planar PIN Diodes With Multi-Thickness Intrinsic Regions

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Solution Overview

Problem

Current design and fabrication techniques for planar PIN diodes limit them to having the same intrinsic region thickness, which is inadequate for high-frequency circuit functions requiring multiple intrinsic region thicknesses for control over frequency ranges and other operating characteristics.

Innovation Solution

A monolithic, vertical, planar semiconductor structure with multiple PIN diodes having different intrinsic regions of varying thicknesses, achieved by forming N-type regions to different depths through openings in a dielectric layer, allowing for integration with other components like capacitors and inductors in a monolithic circuit format.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If traditional vertical layer growth fabrication technique is used, then manufacturing simplicity is maintained, but all diodes are limited to the same intrinsic region thickness

Engineering Contradiction:
Improveintrinsic region thickness varietyVSAvoidfabrication process complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent divides the single intrinsic layer into multiple segments by forming openings at different positions and depths. Each opening exposes a different thickness of the intrinsic layer, allowing multiple diodes with different intrinsic region thicknesses to be fabricated simultaneously. This segmentation approach resolves the contradiction by enabling thickness variety while maintaining a relatively simple planar fabrication process.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from traditional vertical layer growth to a planar fabrication approach with selective etching at different depths. By introducing the depth dimension through controlled etching of openings in the dielectric layer, the method enables variation in intrinsic region thickness across different diode regions without requiring complex multi-step vertical deposition processes for each diode.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Adaptability or versatility

If multiple discrete diodes with different intrinsic region thicknesses are fabricated separately, then frequency control versatility is improved, but device integration complexity and cost increase

Engineering Contradiction:
Improvefrequency response controlVSAvoidmanufacturing cost and integration
Core Design Contradiction:
Adaptability or versatilityVSEase of manufacture

Solution Approach 1:

The patent merges multiple diode fabrication processes into a single integrated planar process. By forming all diodes with different intrinsic region thicknesses on the same substrate using sequential opening formation and doping steps, the method achieves frequency response versatility while reducing manufacturing cost and integration complexity compared to fabricating discrete diodes separately.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent creates a universal fabrication platform that can produce diodes with various intrinsic region thicknesses using the same base process flow. The method employs universal steps such as dielectric layer deposition, opening formation, and ion implantation that can be adapted to create different diode characteristics, thereby achieving multi-functionality in a single manufacturing system.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS20240395946A1Pin diodes with multi-thickness intrinsic regions
Publication Date: 2024.11.28 MACOM TECH SOLUTIONS HLDG INC
  • US20240395946A1 patent drawing
  • US20240395946A1 patent drawing
  • US20240395946A1 patent drawing

AI summary

A monolithic, vertical, planar semiconductor structure with a number diodes having different intrinsic regions is described. The diodes have intrinsic regions of different thicknesses as compared to each other. In one example, the semiconductor structure includes a P-type silicon substrate, an intrinsic layer formed on the P-type silicon substrate, and a dielectric layer formed on the intrinsic layer. A number of openings are formed in the dielectric layer. Multiple anodes are sequentially formed into the intrinsic layer through the openings formed in the dielectric layer. For example, a first N-type region is formed through a first one the openings to a first depth into the intrinsic layer, and a second N-type region is formed through a second one of the openings to a second depth into the intrinsic layer. Additional N-type regions can be formed to other depths.