Planar VLS Epitaxy for Single-Crystal Semiconductors on Mismatched Substrates
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Solution Overview
Problem
High-quality single crystalline semiconductor materials like single crystal germanium and silicon are difficult to manufacture due to lattice mismatch and amorphous substrates leading to defects, which reduce device performance.
Innovation Solution
A template-assisted planar vapor liquid solid (VLS) epitaxy growth process is used to grow nano- and micro-scale single crystal Group IV semiconductors on arbitrary substrates, including amorphous and lattice-mismatched substrates, using a template layer with controlled trench dimensions and catalyst layers to ensure single nucleation and growth.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If conventional epitaxial growth is used on amorphous or lattice-mismatched substrates, then substrate versatility is improved, but crystal quality deteriorates due to defects
Solution Approach 1:
The patent introduces an amorphous silicon buffer layer as an intermediary between the amorphous substrate and the single crystal semiconductor layer. This buffer layer serves as a transition medium that enables epitaxial growth on amorphous substrates while maintaining single crystal quality, thereby resolving the contradiction between substrate versatility and crystal quality
Solution Approach 2:
The patent employs selective thermal annealing at different temperature stages: initial annealing at 600-700°C to form the amorphous silicon buffer layer, followed by high-temperature annealing at 1000-1200°C to grow the single crystal semiconductor layer. These parameter changes enable the system to achieve both substrate versatility and high crystal quality
2Adaptability or versatility
If germanium is epitaxially grown on silicon substrate, then heterogeneous integration is improved, but crystal quality deteriorates due to lattice mismatch
Solution Approach 1:
The patent uses an amorphous silicon buffer layer as an intermediary between the silicon substrate and the germanium layer. This buffer layer accommodates the lattice mismatch between silicon and germanium, enabling heterogeneous integration while preventing defect formation and maintaining high crystal quality in the germanium layer
Solution Approach 2:
The patent utilizes phase transition of silicon from amorphous to crystalline state during thermal annealing. The amorphous silicon buffer layer transitions to a crystalline structure during high-temperature annealing, providing a lattice-matched foundation for germanium growth and reducing lattice mismatch effects
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method enables high-quality single crystal semiconductor growth with reduced defects, improving device performance and enabling heterogeneous integration of germanium and silicon on application-specific substrates for CMOS logic devices.
Implementation Method 1
growing the single crystal semiconductor structure within the trench using a vapor liquid solid epitaxy growth process, wherein the single crystal semiconductor structure is grown from a liquid-solid interface between the seed structure and the bottom surface of the trench
Implementation Method 2
growing the single crystal semiconductor structure within the trench using a vapor liquid solid epitaxy growth process
Data Source
AI summary
A semiconductor device is provided. The semiconductor device includes a template layer disposed over a substrate and having a trench therein, a buffer structure disposed over a bottom surface of the trench and comprising a metal oxide, a single crystal semiconductor structure disposed within the trench and over the buffer structure and a gate structure disposed over a channel region of the single crystal semiconductor structure.