Planarized Cut Patterning in Semiconductor Multiple Patterning
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Multiple patterning schemes in semiconductor manufacturing, such as self-aligned double patterning (SADP), face complications in achieving a planarized surface for cut patterning, requiring different patterning schemes for mandrel and non-mandrel cut patterns, which hinders scalability beyond the 7 nm node.
Innovation Solution
The integration of a multi-patterning scheme with planarized cut patterning is achieved by employing a hard mask material with etch properties similar to the mandrel material for the non-mandrel region, enabling a flat surface for subsequent cut patterning steps through gap fill and etch back processes, allowing for single or multiple EUV lithography exposures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If different patterning schemes are used for mandrel and non-mandrel cut patterns, then the surface planarization requirement is met, but the process complexity increases and scalability is hindered
Solution Approach 1:
The patent merges the patterning schemes for mandrel and non-mandrel cut patterns by using the same multi-patterning scheme for both regions. This is achieved by forming both mandrels and non-mandrels from materials with similar etch properties, allowing a unified etching process to create both structures simultaneously, thereby reducing process complexity while maintaining surface planarization
Solution Approach 2:
The patent applies local quality by making the non-mandrel regions have etch properties similar to mandrel regions through material selection. The non-mandrel regions are filled with hard mask material that has substantially similar etch properties to the mandrel material, enabling both regions to be processed identically while maintaining their distinct functional roles
2Manufacturing precision
If a planarized surface is achieved through gap fill and etch back processes, then uniform cut sizes are enabled, but the manufacturing process becomes more complex
Solution Approach 1:
The patent applies preliminary action by pre-forming the non-mandrel regions with hard mask material that has similar etch properties to mandrels before the final etching step. This preliminary preparation ensures that when the etch back process occurs, both mandrel and non-mandrel regions are at appropriate levels, enabling uniform cut sizes without requiring complex post-processing adjustments
3Adaptability or versatility
If multiple patterning schemes are integrated, then scalability beyond 7 nm node is enabled, but the device structure becomes more complex
Solution Approach 1:
The patent applies universality by creating a multi-functional hard mask material system that serves multiple purposes: it forms non-mandrel regions, provides etch protection, and enables both mandrel and non-mandrel patterning through a single scheme. This universal approach allows the same material and process to be used across different node sizes, enabling scalability without proportionally increasing structural complexity
Data Source
AI summary
A semiconductor device includes at least one mandrel including a dielectric material, and at least one non-mandrel including a hard mask material having an etch property substantially similar to that of the dielectric material.