Planarized Silicon Particles for High-Mobility Displays
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Solution Overview
Problem
Existing methods for fabricating electronic devices on large substrates, such as LCDs and OLEDs, face challenges with amorphous silicon, which has limited mobility and requires complex non-standard techniques for curved surfaces, leading to inefficiencies and higher power consumption.
Innovation Solution
The use of planarized single-crystal silicon particles at predetermined locations on a substrate, allowing for standard lithographic techniques and efficient electrical contact formation, enabling the fabrication of high-performance electronic devices with reduced power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If amorphous silicon is applied to glass substrates for display fabrication, then the substrate can be manufactured with large area, but the electron mobility is limited to approximately 1 cm2/V·s
Solution Approach 1:
The invention divides the substrate into multiple discrete silicon particles or islands, each containing single-crystal silicon regions with high electron mobility. These particles are distributed across the large substrate area, allowing the system to achieve both large overall area and high local electron mobility within each particle.
Solution Approach 2:
The invention creates local regions of single-crystal silicon within each particle that possess high electron mobility, while the rest of the substrate maintains its structural integrity and large area. This local quality approach allows high-performance transistor channels to coexist with large-area substrate requirements.
2Speed
If single-crystal silicon wafers are used for electronic device fabrication, then high electron mobility of approximately 1500 cm2/V·s is achieved, but the wafer size is limited to 300 mm diameter which is too small for large display panels
Solution Approach 1:
Instead of using a single large wafer, the invention segments the substrate into multiple smaller silicon particles, each containing single-crystal silicon regions. These particles can be individually fabricated using standard wafer processes and then assembled across large substrate areas, achieving both high electron mobility and large overall area.
Solution Approach 2:
The invention transitions from a two-dimensional wafer structure to a three-dimensional arrangement of particles distributed across the substrate. This dimensional change allows the system to achieve large effective area by stacking and distributing particles in multiple layers and positions, while maintaining the high electron mobility of single-crystal silicon within each particle.
3Adaptability or versatility
If lithographic structures are defined on spherical silicon surfaces, then electronic devices can be fabricated on curved surfaces, but non-standard optics and complex techniques are required
Solution Approach 1:
The invention performs preliminary planarization of the silicon particle surfaces before lithography. By flattening the particle surfaces in advance, standard planar lithographic techniques can be used without requiring complex non-standard optics or specialized curved-surface fabrication equipment.
Solution Approach 2:
The invention makes the particle surfaces dynamically adaptable by allowing them to be planarized or flattened as needed. This dynamic transformation from curved to planar surfaces enables the use of standard fabrication techniques while maintaining the versatility to work with particles of various initial shapes and sizes.
4Adaptability or versatility
If electrical contacts are made to non-planar spherical surfaces, then devices can be connected to curved surfaces, but non-standard contact techniques are required increasing complexity
Solution Approach 1:
The invention performs preliminary planarization of the particle surfaces where electrical contacts will be made. By creating flat contact surfaces in advance, standard planar contact techniques can be used, eliminating the need for complex non-standard contact methods while maintaining flexibility in device interconnection.
Data Source
AI summary
A device and method of fabricating a device in the form of an array of planarized particles of single crystal silicon or poly crystal silicon wherein the planar surfaces of the particles is used to fabricate an array of electronic devices. This is particularly useful in the manufacture of large displays where single crystal high speed devices are required. The planar surfaces of the array of devices are coplanar when the array is fabricated on a planar substrate.