Plane-Group Status Readout for Faster Multiplane Storage Access

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Solution Overview

Problem

Existing storage devices with independent planes and plane groups face delays in read operations due to waiting for the slowest plane in a group to complete, especially when different page types like SLC and QLC are involved, leading to inefficient performance.

Innovation Solution

Implementing turbo status read and early readout operations, where a storage device provides virtual ready signals for all planes with a single command, allowing faster access to data from the fastest plane within a group before others are ready, and enabling concurrent reading of different page types without waiting for the slowest plane.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the host waits for all planes within a plane group to complete read operations before performing readout, then data consistency across the plane group is maintained, but read performance is reduced due to waiting for the slowest plane

Engineering Contradiction:
Improvedata consistencyVSAvoidread performance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent segments the plane group into individual planes with independent readout capabilities. Each plane can be read out independently once its virtual ready signal is asserted, rather than waiting for the entire plane group to complete. This segmentation allows faster planes to be read out before slower planes, improving overall read performance while maintaining data consistency through proper buffering and ordering.

Inventive Principle:
Principle #1Segmentation

2Measurement precision

If separate status read commands are used to monitor each plane, then accurate status monitoring is achieved, but polling overhead increases

Engineering Contradiction:
Improvestatus monitoring accuracyVSAvoidpolling overhead
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent merges the status monitoring function into a single unified status register that contains virtual ready signals for all planes. Instead of issuing separate status read commands for each plane, the host can poll a single status register to check the readiness of multiple planes simultaneously. This combining approach maintains accurate status monitoring while significantly reducing polling overhead.

Inventive Principle:
Principle #5Merging (Combining)

3Speed

If the host reads data from the fastest plane before other planes are ready, then read latency is reduced, but data availability for the entire plane group is compromised

Engineering Contradiction:
Improveread latencyVSAvoiddata availability
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent implements preliminary action by asserting virtual ready signals for individual planes as soon as they are ready, before the entire plane group completes. This allows the host to begin reading from faster planes early, reducing read latency. Data availability is maintained through proper buffering and ordering mechanisms that ensure data is ready when needed.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS20260064320A1Express status operation for storage devices with independent planes and plane groups
Publication Date: 2026.03.05 INTEL NDTM US LLC
  • US20260064320A1 patent drawing
  • US20260064320A1 patent drawing
  • US20260064320A1 patent drawing

AI summary

A storage device includes a storage array with multiple planes organized as plane groups, where the planes of a plane group receive and process commands in parallel. The storage device includes a storage controller that receives a command from a host controller. In response to receipt of the command the storage controller provides ready information for all planes to the host controller. The multiple planes can optionally have independent multiplane read operation (IMPRO). Each plane group can have a first plane and a second plane, and the storage controller can optionally read data from the first plane of a plane group in response to a virtual ready signal for the first plane, before the second plane of the plane group is ready.