Plane Level Dedicated Starting Program Voltage for Multi-Plane Concurrent Programming
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Solution Overview
Problem
Existing non-volatile memory apparatuses face inefficiencies in programming time due to the use of a smart verify programming voltage that is not optimized for all planes, leading to increased program time and decreased performance.
Innovation Solution
A memory apparatus and method where a control means acquires individually optimized smart verify programming voltages for each plane during a smart verify operation, allowing concurrent programming across multiple planes using these voltages, thereby optimizing programming speed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single smart verify programming voltage is used for all planes, then the control means can simplify voltage management, but programming time increases and performance decreases for planes that require higher voltages
Solution Approach 1:
The patent applies local quality by acquiring and using individually optimized smart verify programming voltages for each plane. Each plane receives a dedicated voltage (first smart verify programming voltage for first plane, second smart verify programming voltage for second plane, etc.) that is specifically optimized for that plane's characteristics, rather than using a single universal voltage for all planes.
2Productivity
If individually optimized smart verify programming voltages are acquired for each plane, then programming speed improves, but the smart verify operation time increases due to additional voltage acquisition steps
Solution Approach 1:
The patent applies preliminary action by performing the smart verify operation to acquire optimized programming voltages for each plane before the actual concurrent programming operation begins. The control means first executes smart verify loops for each plane individually to determine the optimal voltage, and only after this preliminary voltage acquisition does the control means proceed to the concurrent programming phase where these pre-determined voltages are applied.
3Productivity
If concurrent programming is performed across multiple planes, then programming throughput increases, but program time increases for planes that require higher programming voltages
Solution Approach 1:
The patent applies local quality by providing each plane with its own optimized programming voltage during concurrent operations. The control means uses the first smart verify programming voltage for the first plane and the second smart verify programming voltage for the second plane, allowing each plane to be programmed at its optimal voltage level simultaneously without delaying others.
Solution Approach 2:
The patent applies dynamics by enabling the control means to dynamically select and apply different programming voltages for different planes during concurrent operations. The system can switch between voltage levels based on the specific plane being programmed, allowing flexible voltage management that adapts to each plane's requirements while maintaining concurrent operation.
Data Source
AI summary
A memory apparatus and operating method are provided. The apparatus includes memory cells connected to word lines and disposed in memory holes and configured to retain a threshold voltage. The memory holes are organized in rows grouped in strings and the strings comprise a plurality of blocks which comprise planes. A control means is configured to program the memory cells connected to one of the word lines and associated with one of the strings in each of the plurality of planes and acquire a smart verify programming voltage individually for each of the planes in a smart verify operation. The control means concurrently programs at least some of the memory cells connected to each of the word lines in each of the planes in a program operation using the smart verify programming voltage individually acquired for each of the planes in the smart verify operation.