Plasma Chamber Readiness Detection via Electrical Modeling
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Plasma processing systems face challenges in determining readiness without generating plasma, leading to resource wastage and false positive alarms due to incomplete troubleshooting.
Innovation Solution
A test system that uses a computer-readable medium with a test program to receive electric parameter values from sensors, generate electric model parameter values, and compare them with baseline information to determine system readiness, avoiding plasma generation and false alarms.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If test wafers are processed with plasma to determine system readiness, then the accuracy of readiness determination is improved, but resource consumption and cost increase substantially
Solution Approach 1:
The patent creates an electrical model that copies the essential electrical characteristics of the plasma processing chamber and compares it with a baseline model. This virtual copy allows readiness determination without physically processing test wafers, thereby eliminating wafer consumption while maintaining diagnostic accuracy.
Solution Approach 2:
The patent replaces the mechanical/physical test processing method with an electrical measurement and modeling approach. By substituting the physical plasma-wafer interaction with electrical property measurements and mathematical modeling, the system achieves readiness assessment without consuming test wafers or generating actual plasma.
2Loss of energy
If electrical property values are compared with fingerprints to determine readiness, then resource consumption is reduced, but false positive alarms increase due to power delivery system issues
Solution Approach 1:
The patent segments the plasma processing system into distinct electrical components (power delivery system, matching network, plasma chamber, etc.) and creates separate electrical model parameters for each. This segmentation allows identification of which specific component causes deviations, enabling differentiation between power delivery issues and actual chamber problems, thereby reducing false positives.
Solution Approach 2:
The patent introduces an electrical model as an intermediary between raw electrical measurements and readiness determination. The model parameters serve as a mediator that translates electrical property variations into meaningful diagnostic information, filtering out noise from power delivery fluctuations and highlighting actual chamber issues.
3Measurement precision
If conventional plasma-based testing is performed, then system readiness can be determined, but production time and manufacturing yield are negatively affected
Solution Approach 1:
The patent performs preliminary electrical measurements and model comparisons that can be completed quickly without initiating plasma generation. By conducting the diagnostic assessment before committing resources to plasma-based testing, the system determines readiness in advance, avoiding unnecessary plasma generation and associated production delays.
Data Source
AI summary
A test system for facilitating determining whether a plasma processing system (which includes a plasma processing chamber) is ready for processing wafers. The test system may include a computer-readable medium storing at least a test program. The test program may include code for receiving electric parameter values derived from signals detected by at least one sensor when no plasma is present in the plasma processing chamber. The test program may also include code for generating electric model parameter values using the electric parameter values and a mathematical model. The test program may also include code for comparing the electric model parameter values with baseline model parameter value information. The test program may also include code for determining readiness of the plasma processing system based on the comparison. The test system may also include circuit hardware for performing one or more tasks associated with the test program.


