CAD Tool for Plasma Charging Damage Evaluation
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Solution Overview
Problem
The semiconductor industry faces challenges in minimizing plasma-induced charging damages to gate oxides during manufacturing, due to the lack of comprehensive and systematic approaches, leading to significant operational losses and high costs associated with experimentation and proprietary information barriers between equipment vendors, foundries, and manufacturers.
Innovation Solution
A computer-aided-design (CAD) tool that simulates and evaluates the plasma-induced charging effect on MOS transistor gate oxides, incorporating advanced multiple-terminal transistor charging models, compact transistor models, and numerical solving schemes to estimate voltage across the gate oxide, aiding in the design of plasma equipment and process recipes to minimize damage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If plasma processes are used for IC manufacturing, then manufacturing capability is improved, but gate oxide charging damage increases
Solution Approach 1:
The patent applies preliminary action by using simulation tools to predict and evaluate plasma charging effects before actual manufacturing processes occur. The system allows engineers to pre-determine optimal process parameters and design configurations that minimize gate oxide charging damage, enabling proactive prevention rather than reactive correction of plasma-induced damage.
Solution Approach 2:
The patent implements feedback mechanisms through comprehensive simulation and evaluation systems that continuously monitor and analyze plasma process outcomes. The system provides feedback on charging effects, allowing iterative optimization of plasma process parameters and transistor designs to achieve the desired balance between manufacturing capability and damage minimization.
2Measurement precision
If comprehensive plasma process parameters are considered, then charging damage accuracy is improved, but system complexity increases
Solution Approach 1:
The patent applies segmentation by dividing the complex plasma charging evaluation system into multiple independent modules, including plasma source characterization, transistor model, circuit model, and damage evaluation components. Each module can be developed, tested, and optimized separately, making the overall system more manageable while maintaining comprehensive accuracy through the integration of these segmented functional units.
Data Source
AI summary
A computer-implemented method capable of evaluating a plasma-induced charging effect to a transistor in a plasma-based process for a dielectric layer performed above the transistor on which a metal layer is formed is provided. The method may include receiving parameters relating to the transistor, receiving parameters relating to an interconnection, receiving parameters relating to the plasma-based process, assigning first potentials to terminals of the transistor, calculating second potentials at the terminals of the transistor, and determining a degradation state of the transistor according to the second potentials at the terminals of the transistor.