Plasma Cutting Semiconductor Substrates with Passivation Protection

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Solution Overview

Problem

Existing methods for singulating semiconductor chips struggle to efficiently separate thin semiconductor chips without damaging the metal interconnections, leading to incomplete separation and potential failure in the singulation process.

Innovation Solution

A method involving the formation of a passivation layer on the substrate, followed by the creation of a self-assembled monolayer and plasma cutting in the scribe lane region to form a recess, which is terminated before reaching the metal interconnection, allowing for subsequent tensile force application to sever the connection without particle production.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If plasma cutting is used to separate semiconductor chips, then cutting efficiency is improved, but metal interconnections may be damaged causing particle formation

Engineering Contradiction:
Improvecutting efficiencyVSAvoidmetal interconnection integrity
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

A passivation layer is formed over the metal interconnections before plasma cutting. This preliminary protective action prevents the plasma from directly contacting and damaging the metal interconnections, thereby eliminating particle formation while maintaining high cutting efficiency

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The passivation layer acts as an intermediary barrier between the plasma cutting tool and the metal interconnections. It allows the plasma to cut through the substrate efficiently while the intermediary layer absorbs and protects the underlying metal structures from damage

Inventive Principle:
Principle #24Intermediary (Mediator)

2Manufacturing precision

If complete separation of device regions is achieved, then singulation quality is improved, but metal interconnections may elongate and cause failure

Engineering Contradiction:
Improveseparation completenessVSAvoidmetal interconnection strength
Core Design Contradiction:
Manufacturing precisionVSStrength

Solution Approach 1:

The passivation layer is applied in advance to protect metal interconnections during the separation process. This preliminary protection enables complete separation of device regions without causing metal interconnection elongation or failure

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The plasma cutting process, which could potentially harm metal interconnections, is converted into a beneficial process by using the passivation layer to protect the metal while allowing the plasma to effectively separate the device regions

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables reliable and cost-effective singulation of semiconductor chips by preventing metal interconnection elongation and particle formation, ensuring high-reliability semiconductor products.

Implementation Method 1

cutting into the scribe lane region of the substrate using a plasma

Methodology Applied
Scientific EffectPlasma etching: Plasma

Implementation Method 2

forming a recess in the scribe lane region by deep reactive ion etching (DRIE)

Methodology Applied
Scientific EffectDeep reactive ion etching (DRIE):

Implementation Method 3

forming a self-assembled monolayer over the passivation layer

Methodology Applied
Scientific EffectSelf-assembly: Self-Assembly

Data Source

PatentUS10867857B2Method of cutting substrate and method of singulating semiconductor chips
Publication Date: 2020.12.15 SAMSUNG ELECTRONICS CO LTD
  • US10867857B2 patent drawing
  • US10867857B2 patent drawing
  • US10867857B2 patent drawing

AI summary

A method of cutting a substrate including a device region and a scribe lane region includes selectively forming a passivation layer in the device region of the substrate, selectively forming a self-assembled monolayer on the passivation layer, and performing plasma cutting in the scribe lane region.