Low-Pressure Plasma Etch for Uniform Fin Isolation Trenches
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Solution Overview
Problem
Silicon etch processes face local depth nonuniformity due to variations in the pattern factor, leading to variability in etch rates and final product non-uniformity, which affects the performance and functionality of semiconductor devices.
Innovation Solution
A plasma etch process is developed that uses a non-volatile silicon oxide-based etch residue, independent of the local pattern factor, to achieve uniform etch depths and reduce variability in trench depths, enhancing electrical isolation between semiconductor fins.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional silicon etch processes are used, then etching can be performed, but local depth nonuniformity occurs due to pattern factor variations
Solution Approach 1:
The patent changes the chemical parameters of the etch process by introducing a oxygen-containing gas component to the etch chemistry. This modification alters the etch reaction mechanism to produce silicon oxide residues instead of volatile silicon halides, fundamentally changing the residue generation and removal characteristics to achieve pattern factor independence
Solution Approach 2:
The patent employs oxygen-containing gases (such as O2, OF2, or CO) during the etch process to oxidize silicon at the etch front, forming silicon oxide residues. This oxidation mechanism replaces the conventional volatile silicon halide formation, creating a non-volatile residue that does not depend on pattern factor for its formation or removal, thereby achieving uniform etch depths
2Strength
If polymer-rich etch processes are used to protect sidewalls, then sidewall protection is achieved, but etch depth variability increases due to polymer loading effects
Solution Approach 1:
The patent changes the residue type from volatile polymer to non-volatile silicon oxide, fundamentally altering how sidewall protection works. Instead of relying on polymer deposition that varies with pattern factor, the silicon oxide residue provides consistent protection through its physical presence, which is removed uniformly by subsequent processes regardless of local pattern variations
Solution Approach 2:
The patent converts the traditionally harmful residue removal variability into a benefit. By using non-volatile silicon oxide residues that are consistently formed and removed, what was previously a source of variability (residue management) becomes a mechanism for achieving pattern factor independence and improved etch depth uniformity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The process ensures uniform etch depths and sufficient electrical isolation between semiconductor fins, improving the performance and functionality of fin field effect transistors by reducing the impact of pattern factor variations.
Implementation Method 1
A plasma etch process is developed that uses a non-volatile silicon oxide-based etch residue
Data Source
AI summary
A semiconductor structure may be provided by: forming semiconductor fins over a semiconductor substrate; forming a gate dielectric layer and gate electrodes; forming a silicon layer over the gate electrodes; forming a dielectric mask layer including openings over the silicon layer; etching portions of the silicon layer that underlie the openings by performing a first anisotropic etch process; etching portions of the gate electrodes that underlie the openings by performing a second anisotropic etch process; and removing portions of the semiconductor fins and portions of the semiconductor substrate that underlie the openings by performing a third anisotropic etch process. At least one anisotropic etch step within the third anisotropic etch process comprises at least one low pressure etch step that is performed at a total pressure in a range from 5 mTorr to 50 mTorr.