Plasma Etching for Precise IC Pattern Transfer
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Solution Overview
Problem
The high cost and technical complexity of double exposure and multiple exposure processes in integrated circuit manufacturing, particularly in achieving smaller pitch patterns, pose significant challenges in reducing manufacturing costs and improving pattern transfer quality.
Innovation Solution
A method utilizing plasma etching to fabricate precise patterns by creating large pitch trenches or through-holes in a first dielectric layer, followed by forming micro trenches on a second dielectric layer using high-density plasma with fluorine-based gases, and then reducing the pitch through subsequent etching processes, allowing for the optimization of etching profiles and cost-effective pattern transfer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If double exposure or multiple exposure processes are used to achieve smaller pitch patterns, then manufacturing precision is improved, but manufacturing cost increases significantly
Solution Approach 1:
The patent segments the pitch reduction process into two distinct stages: first forming large pitch patterns through conventional lithography, then using plasma etching with ion bombardment to create micro trenches that reduce the pitch. This segmentation avoids the need for multiple expensive exposure processes while achieving the same pitch reduction effect.
Solution Approach 2:
The patent replaces the optical-based multiple exposure system with a plasma-based mechanical etching system. Instead of using multiple lithography exposures to reduce pitch, the invention uses plasma etching with controlled ion bombardment to physically carve micro trenches, substituting an optical-mechanical system with a direct plasma-mechanical system that is more cost-effective.
2Manufacturing precision
If double exposure technology is used to transfer patterns, then pattern transfer capability is improved, but process complexity increases
Solution Approach 1:
The patent extracts the pitch reduction function from the complex multiple exposure process and implements it through a dedicated plasma etching step. By separating the pattern formation (lithography) from the pitch reduction (plasma etching with ion bombardment), the process complexity is reduced while maintaining pattern transfer capability.
Solution Approach 2:
The patent changes the fundamental parameter of pitch reduction from optical exposure parameters to plasma etching parameters. Instead of adjusting exposure dose and focus across multiple lithography steps, the invention controls pitch reduction through plasma power, gas flow, and ion bombardment energy, simplifying the process control framework.
3Ease of manufacture
If conventional lithography is used for pattern transfer, then process simplicity is maintained, but pitch reduction capability is insufficient
Solution Approach 1:
The patent performs preliminary pattern formation using conventional simple lithography to create large pitch patterns, then applies plasma etching with ion bombardment as a subsequent action to reduce the pitch. This preliminary action approach maintains process simplicity for the main pattern formation while adding a targeted pitch reduction step.
Solution Approach 2:
The patent transitions from two-dimensional planar lithography to three-dimensional plasma etching with vertical ion bombardment. By introducing the vertical dimension of ion bombardment and micro trench formation, the system achieves pitch reduction that cannot be obtained through conventional planar lithography alone, while maintaining relative process simplicity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method simplifies the process flow, reduces manufacturing costs, and enables the production of high-end chips with significantly reduced pitch, leveraging existing equipment and process optimizations to achieve precise pattern transfer with lower costs.
Implementation Method 1
forming micro trenches on a hard mask of a second dielectric layer at the bottom side wall of the trench or circular through-hole structure by a plasma etching process
Implementation Method 2
plasma with high density and high ionization rate is used for etching
Implementation Method 3
the etching gas is fluorine-based discharge gas; The fluorine-based discharge gas is a mixture of fluorine-based gas and argon gas
Data Source
AI summary
A method for preparing precise pattern of integrated circuits, which comprises the following steps: (S1) preparing a large pitch trench or circular through-hole structure with a hard mask in a first dielectric layer by lithography and etching; (S2) forming micro trench on the hard mask of the second dielectric layer at the bottom side wall of the trench or circular through-hole structure by plasma etching process; (S3) removing the first dielectric layer; (S4) opening the hard mask of the second dielectric layer at the micro trench formed on the hard mask of the second dielectric layer by plasma etching process; (S5) small pitch trench or circular through holes are prepared in the second dielectric layer.