Plasma Etching of Stacked Dielectrics for High-Aspect-Ratio CD Control
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Solution Overview
Problem
Existing plasma etching methods struggle to efficiently etch high aspect ratio structures in semiconductor fabrication, particularly in stacked dielectric layers, with challenges in critical dimension control, local CD uniformity, and manufacturing yield, limiting the scalability of 3D devices like stacked DRAM and V-NAND memory.
Innovation Solution
A plasma etching method using a gas mixture of carbonyl sulfide, perfluorocarbon, and oxygen generates a plasma to selectively etch a tungsten silicon nitride layer over a dielectric layer, achieving high etch selectivity and low local critical dimension uniformity, suitable for patterning high aspect ratio structures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional plasma etching methods are used, then the etching process can be performed, but etch selectivity is insufficient and local CD uniformity is poor
Solution Approach 1:
The patent modifies the plasma process parameters by introducing a sulfur-containing compound (H2S or SO2) into the etching gas mixture. This chemical parameter change enables selective etching of the silicon nitride layer while preserving the tungsten layer, achieving both high etch selectivity and improved local CD uniformity through controlled chemical reactions in the plasma environment.
2Productivity
If feature sizes are shrunk to double component density, then device density increases, but aspect ratio of structures increases making etching more difficult
Solution Approach 1:
By changing the chemical composition of the etching plasma through sulfur-containing compounds, the patent achieves precise control over etching kinetics. This enables successful etching of high aspect ratio structures with aspect ratios exceeding 10:1, maintaining manufacturing precision even as device density increases through feature size shrinkage and vertical stacking.
3Productivity
If vertical stacking is increased to meet memory density demand, then memory capacity increases, but ability to etch high aspect ratio holes through molding layer is limited
Solution Approach 1:
The sulfur-containing compound acts as a chemical intermediary that mediates the etching reaction between the plasma and the silicon nitride layer. This intermediary enables the formation of volatile sulfur-nitrogen compounds that facilitate selective removal of silicon nitride, allowing etching of high aspect ratio holes through thick molding layers for increased vertical stacking of memory cells.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method improves etch selectivity and reduces local CD uniformity, enabling precise pattern transfer with reduced variability in electrical characteristics, facilitating the fabrication of high-density memory devices like DRAM and V-NAND.
Implementation Method 1
ionizing the gas in the plasma chamber to generate a plasma
Implementation Method 2
exposing the substrate to the plasma, the exposing selectively etching the dielectric layer with the pattern of the patterned WxSiyNz layer
Data Source
AI summary
A method for etching a pattern in a layer of a substrate includes holding the substrate in a plasma chamber, the substrate including a patterned tungsten silicon nitride (WxSiyNz) layer over a dielectric layer formed on an underlayer, the dielectric layer being a stack of alternating layers of silicon oxide and silicon nitride; flowing a gas over the substrate in the plasma chamber to provide a first flow of carbonyl sulfide (COS) at a first flow rate, a second flow of a perfluorocarbon (CxFy) at a second flow rate, and a third flow of oxygen (O2) at a third flow rate; ionizing the gas in the plasma chamber to generate a plasma; and exposing the substrate to the plasma, the exposing selectively etching the dielectric layer with the pattern of the patterned WxSiyNz layer to form a patterned dielectric layer.


