Plasma Nitride SOI Structure for Impurity Barrier and Uniform Layer Transfer
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current methods for preparing semiconductor-on-insulator (SOI) structures face challenges such as impurity influence from handle substrates, costly processes, and non-uniformity in layer thickness, especially in multilayer structures, which affect the quality and integration of devices.
Innovation Solution
A method involving the deposition of insulating layers like silicon nitride and silicon oxide between semiconductor handle and donor substrates, forming a bonded structure with a cleave plane, which resists impurities and allows for improved layer transfer with reduced costs and enhanced uniformity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional wafer bonding methods are used to prepare semiconductor-on-insulator structures, then the process can achieve layer transfer, but impurities from handle substrates influence the device quality and the thickness uniformity is poor
Solution Approach 1:
A plasma nitride layer is introduced as an intermediate barrier layer between the handle substrate and the device layer. This nitride layer acts as a diffusion barrier that prevents impurities from the handle substrate from migrating into the device layer, thereby protecting device quality while maintaining the structural integrity of the bonded wafer.
Solution Approach 2:
The insulating layer is segmented into multiple sub-layers including a plasma nitride layer and a plasma oxide layer. This segmentation allows each layer to perform specific functions: the nitride layer provides impurity barrier protection while the oxide layer provides electrical insulation, collectively improving device quality by addressing multiple requirements separately.
2Quantity of substance
If thick film device layers are used (1.5-20 micrometers), then the structure can accommodate certain device requirements, but the thickness uniformity and precision are reduced
Solution Approach 1:
The patent employs plasma-based deposition processes with controlled parameters to deposit the nitride and oxide layers. By optimizing plasma power, pressure, gas flow rates, and deposition temperature, the process achieves superior thickness uniformity and precision even for thicker device layers, overcoming the typical trade-off between layer thickness and uniformity.
3Strength
If conventional bonding processes are used, then wafer bonding can be achieved, but the process is costly and time-consuming
Solution Approach 1:
The patent replaces conventional high-temperature thermal bonding processes with plasma-based surface activation and bonding. The plasma treatment activates surface groups to enhance bonding without requiring prolonged high-temperature annealing, thereby reducing process time and cost while maintaining adequate bond strength for device fabrication.
4Reliability
If plasma treatment is applied to deposit insulating layers, then impurity resistance and thickness uniformity are improved, but the process complexity increases
Solution Approach 1:
The plasma deposition process serves multiple functions simultaneously: it deposits the insulating nitride and oxide layers with controlled thickness and uniformity, activates surface groups for enhanced bonding, and creates a dense structure that resists impurity diffusion. This multi-functionality reduces the need for separate process steps, thereby limiting the increase in overall process complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively resists impurities from handle substrates, reduces costs, and achieves better thickness uniformity in the semiconductor-on-insulator structure, improving the quality and integration of semiconductor devices.
Implementation Method 1
a plasma nitride layer which resists impurities contained in a handle substrate from having an influence on the device
Implementation Method 2
bonding a donor dielectric layer in interfacial contact with a front surface of a single crystal semiconductor donor substrate to the handle semiconductor nitride layer to thereby form a bonded structure, wherein the single crystal semiconductor donor substrate comprises a cleave plane
Data Source
AI summary
A method is provided for preparing a semiconductor-on-insulator structure comprising a silicon nitride layer deposited by plasma deposition.


