Hydrogen Plasma Nucleation for High-Aspect-Ratio Silicon Channels
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Solution Overview
Problem
Existing methods for thermally processing semiconductor substrates with high aspect ratio features, such as those found in 3D memory structures, face challenges in achieving adequate grain growth while minimizing thermal budgets and maintaining high throughput.
Innovation Solution
The method involves exposing a silicon-containing layer of a channel structure in a substrate to a hydrogen-or-deuterium plasma at controlled temperatures (100° C. to 1100° C.) to facilitate nucleation and grain growth, followed by thermal annealing to promote further grain enlargement.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional thermal annealing alone is used to crystallize and grow semiconductor grains, then grain growth is achieved, but thermal budget increases (high temperatures for long residence times)
Solution Approach 1:
The patent applies preliminary nucleation action by exposing the amorphous silicon layer to hydrogen radicals before thermal annealing. This pre-nucleation step creates initial crystal nuclei that serve as seeds for subsequent grain growth, eliminating the need for high-temperature annealing alone and reducing the overall thermal budget while achieving adequate grain sizes
Solution Approach 2:
The patent changes the physical-chemical parameters of the silicon layer by introducing hydrogen radicals that modify the nucleation characteristics. This parameter change enables crystallization at lower temperatures by altering the energy barrier for nucleation, thus resolving the contradiction between achieving grain growth and minimizing thermal budget
2Manufacturing precision
If residence time is extended to achieve adequate grain growth, then grain size increases, but throughput decreases
Solution Approach 1:
By performing preliminary nucleation with hydrogen radicals before thermal annealing, the patent creates ready-made nuclei that accelerate subsequent grain growth. This preliminary action reduces the residence time required for adequate grain development, thereby maintaining high throughput while achieving the necessary grain sizes for device performance
Solution Approach 2:
The patent substitutes the purely thermal mechanism of grain growth with a chemical-nucleation mechanism. Instead of relying solely on thermal energy to drive nucleation and growth over long periods, hydrogen radical chemistry provides an alternative pathway that accelerates the process, reducing residence time and improving throughput
3Object-affected harmful factors
If temperature is reduced to minimize thermal budget, then thermal damage decreases, but grain growth becomes inadequate
Solution Approach 1:
The patent changes the nucleation parameters by introducing hydrogen radicals, which modify the crystallization kinetics. This parameter change enables adequate grain growth at reduced temperatures by lowering the activation energy barrier for nucleation, thus achieving both minimal thermal damage and sufficient grain size
Solution Approach 2:
Hydrogen radicals act as an intermediary that facilitates nucleation at lower temperatures. These radicals interact with the amorphous silicon to promote crystal nucleus formation, enabling grain growth to proceed effectively at reduced temperatures where thermal damage is minimized
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances electron mobility within the semiconductor channel layer by increasing the average grain size, thereby improving device performance while reducing the thermal budget and maintaining high throughput.
Implementation Method 1
exposing the substrate to a hydrogen-or-deuterium plasma in the first processing volume at a flow rate of about 10 sccm to about 5000 sccm. The substrate is annealed in the first processing volume at a temperature of about 100° C. to about 1100° C. during the exposing forming a nucleated substrate
Implementation Method 2
The substrate is annealed in the first processing volume at a temperature of about 100° C. to about 1100° C. during the exposing forming a nucleated substrate. Subsequent to exposing the substrate, the nucleated substrate is thermally annealed.
Implementation Method 3
A silicon-containing layer of a channel structure, such as in a 3D memory structure of the substrate is exposed to a hydrogen-or-deuterium plasma in the first processing volume
Data Source
AI summary
The present disclosure provides systems and methods for processing channel structures of substrates that include positioning the substrate in a first processing chamber having a first processing volume. The substrate includes a channel structure with high aspect ratio features having aspect ratios greater than about 20:1. The method includes forming a silicon-containing layer over the channel structure to a hydrogen-or-deuterium plasma in the first processing volume at a flow rate of about 10 sccm to about 5000 sccm. The substrate is maintained at a temperature of about 100° C. to about 1100° C. during the exposing, the exposing forming a nucleated substrate. Subsequent to the exposing a thermal anneal operation is performed on the substrate.